参数资料
型号: MC74F157AJ
厂商: MOTOROLA INC
元件分类: 编、解码器及复用、解复用
英文描述: F/FAST SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, CDIP16
封装: CERAMIC, DIP-16
文件页数: 2/3页
文件大小: 50K
代理商: MC74F157AJ
LIFETIME
BUY
LAST
ORDER
31/03/99
LAST
SHIP
30/09/99
MC74F157A
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
VCC
Supply Voltage
74
4.5
5.0
5.5
V
TA
Operating Ambient Temperature Range
74
0
25
70
°C
IOH
Output Current — High
74
–1.0
mA
IOL
Output Current — Low
74
20
mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol
Parameter
Min
Typ
Max
Unit
Test Conditions
VIH
Input HIGH Voltage
2.0
V
Guaranteed Input HIGH Voltage
VIL
Input LOW Voltage
0.8
V
Guaranteed Input LOW Voltage
VIK
Input Clamp Diode Voltage
–1.2
V
IIN = –18 mA
VCC = MIN
VOH
Output HIGH Voltage
74
2.7
3.4
V
IOH = –1.0 mA
VCC = 4.75 V
74
2.5
VCC = 4.50 V
VOL
Output LOW Voltage
0.35
0.5
V
IOL = 20 mA
VCC = MIN
IIH
Input HIGH Current
20
A
VIN = 2.7 V
VCC = MAX
100
A
VIN = 7.0 V
IIL
Input LOW Current
–0.6
mA
VIN = 0.5 V
VCC = MAX
IOS
Output Short Circuit Current (Note 2)
–60
–150
mA
VOUT = 0 V
VCC = MAX
ICC
Power Supply Current
15
23
mA
All Inputs = 4.5 V
VCC = MAX
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
AC CHARACTERISTICS
74F
TA = +25°C
VCC = +5.0 V
CL = 50 pF
TA = 0°C to 70°C
VCC = 5.0 V ±10%
CL = 50 pF
Symbol
Parameter
Min
Max
Min
Max
Unit
tPLH
Propagation Delay
3.5
10
3.5
11
ns
tPHL
S to Zn
3.0
7.0
3.0
8.0
tPLH
Propagation Delay
3.5
9.5
3.5
11
ns
tPHL
E to Zn
2.5
6.5
2.5
7.0
tPLH
Propagation Delay
2.0
6.0
2.0
6.5
ns
tPHL
In to Zn
2.5
5.5
2.0
7.0
FUNCTIONAL DESCRIPTION
The F157A is a quad 2-input multiplexer. It selects four bits
of data from two sources under the control of a common Select
input (S). The Enable input (E) is active LOW. When E is
HIGH, all of the outputs (Z) are forced LOW regardless of all
other inputs. The F157A is the logic implementation of a
4-pole, 2-position switch where the position of the switch is de-
termined by the logic levels supplied to the Select input. The
logic equations for the outputs are shown below:
Za = E (I1a S + I0a S)
Zc = E (I1c S + I0c S)
A common use of the F157A is the moving of data from two
groups of registers to four common output busses. The partic-
ular register from which the data comes is determined by the
state of the Select input. A less obvious use is as a function
generator. The F157A can generate any four of the 16 different
functions of two variables with one variable common. This is
useful for implementing highly irregular logic.
Zb = E (I1b S + I0b S)
Zd = E (I1d S + I0d S)
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