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参数资料
| 型号： | MC74HC10AN |
| 厂商： | MOTOROLA INC |
| 元件分类： | 通用总线功能 |
| 英文描述： | Triple 3-Input NAND Gate |
| 中文描述： | HC/UH SERIES, TRIPLE 3-INPUT NAND GATE, PDIP14 |
| 封装： | PLASTIC, DIP-14 |
| 文件页数： | 3/5页 |
| 文件大小： | 133K |
| 代理商： | MC74HC10AN |
MC74HC10A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
Voltage
|Iout|
20
μ
A
0.1
0.1
4.5
Vin = VCC or GND
μ
A
5.2 mA
0.26
0.26
0.1
0.40
0.40
Vin = VIH or VIL
|Iout|
|Iout|
|Iout|
4.5
6.0
0.33
0.33
Current (per Package)
Maximum Quiescent Supply
A
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
(CL = 50 pF, Input tr = tf = 6 ns)
VCC
V
Guaranteed Limit
6.0
45
16
– 55 to
30
13
25
6.0
Maximum Propagation Delay, Input A, B, or C to Output Y
(Figures 1 and 2)
3.0
19
60
75
tTHL
(Figures 1 and 2)
3.0
75
40
16
55
ns
CPD
Power Dissipation Capacitance (Per Gate)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
Typical @ 25
°
C, VCC = 5.0 V
25
pF
Y
B
C
Figure 1. Switching Waveforms
INPUT
A, B, OR C
OUTPUT Y
tf
tr
VCC
GND
tPHL
tPLH
tTLH
tTHL
90%
50%
10%
90%
50%
10%
A
EXPANDED LOGIC DIAGRAM
(1/3 OF THE DEVICE)
* Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 2. Test Circuit
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC74HC10DR2 | 制造商:ON Semiconductor 功能描述:NAND Gate 3-Element 3-IN CMOS 14-Pin SOIC T/R |
| MC74HC10F | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC10FL2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| MC74HC10N | 制造商:Motorola Inc 功能描述: 制造商:ON SEM 功能描述: 制造商:ON Semiconductor 功能描述: |
| MC74HC10ND | 制造商:Motorola Inc 功能描述: |
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