参数资料
型号: MC74HC4040ADR2
厂商: ON Semiconductor
文件页数: 6/11页
文件大小: 0K
描述: IC COUNTER RIPPLE 12STAGE 16SOIC
标准包装: 1
系列: 74HC
逻辑类型: 二进制计数器
方向:
元件数: 1
每个元件的位元数: 12
复位: 异步
计数速率: 50MHz
触发器类型: 负边沿
电源电压: 2 V ~ 6 V
工作温度: -55°C ~ 125°C
安装类型: 表面贴装
封装/外壳: 16-SOIC(0.154",3.90mm 宽)
供应商设备封装: 16-SOIC
包装: 标准包装
其它名称: MC74HC4040ADRODKR
MC74HC4040ADRODKR-ND
MC74HC4040ADROSDKR
MC74HC4040A
http://onsemi.com
4
DC CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Unit
Guaranteed Limit
VCC
V
Condition
Parameter
Symbol
Unit
≤125°C
≤85°C
55 to 25°C
VCC
V
Condition
Parameter
Vin = VIH or VIL
|Iout| ≤ 2.4mA
|Iout| ≤ 4.0mA
|Iout| ≤ 5.2mA
3.0
4.5
6.0
0.26
0.33
0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±0.1
±1.0
mA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0mA
6.0
4
40
160
mA
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
Symbol
Parameter
VCC
V
Guaranteed Limit
Unit
55 to 25°C
≤85°C
≤125°C
fmax
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4)
2.0
3.0
4.5
6.0
10
15
30
50
9.0
14
28
45
8.0
12
25
40
MHz
tPLH,
tPHL
Maximum Propagation Delay, Clock to Q1*
(Figures 1 and 4)
2.0
3.0
4.5
6.0
96
63
31
25
106
71
36
30
115
88
40
35
ns
tPHL
Maximum Propagation Delay, Reset to Any Q
(Figures 2 and 4)
2.0
3.0
4.5
6.0
65
30
26
72
36
35
32
90
40
35
ns
tPLH,
tPHL
Maximum Propagation Delay, Qn to Qn+1
(Figures 3 and 4)
2.0
3.0
4.5
6.0
69
40
17
14
80
45
21
15
90
50
28
22
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 4)
2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
15
110
36
22
19
ns
Cin
Maximum Input Capacitance
10
pF
* For TA = 25°C and CL = 50 pF, typical propagation delay from Clock to other Q outputs may be calculated with the following equations:
VCC = 2.0 V: tP = [93.7 + 59.3 (n1)] ns
VCC = 4.5 V: tP = [30.25 + 14.6 (n1)] ns
VCC = 3.0 V: tP = [61.5 + 34.4 (n1)] ns
VCC = 6.0V: tP = [24.4 + 12 (n1)] ns
CPD
Power Dissipation Capacitance (Per Package)*
Typical @ 25°C, VCC = 5.0 V
pF
31
* Used to determine the noload dynamic power consumption: PD = CPD VCC2f + ICC VCC.
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