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| 型号： | MC74HC589AFELG |
| 厂商： | ON Semiconductor |
| 文件页数： | 13/14页 |
| 文件大小： | 0K |
| 描述： | IC SHIFT REGISTER 8BIT 16-SOEIAJ |
| 产品变化通告： | Product Discontinuation 30/Sept/2011 |
| 标准包装： | 2,000 |
| 系列： | 74HC |
| 逻辑类型： | 移位寄存器 |
| 输出类型： | 标准 |
| 元件数： | 1 |
| 每个元件的位元数： | 8 |
| 功能： | 通用 |
| 电源电压： | 2 V ~ 6 V |
| 工作温度： | -55°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.209"，5.30mm 宽） |
| 供应商设备封装： | 16-SOEIAJ |
| 包装： | 带卷 (TR) |
MC74HC589A
http://onsemi.com
8
AH
50%
LATCH
CLOCK
VCC
GND
*Includes all probe and jig capacitance.
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
DATA
VALID
tsu
th
SA
50%
SHIFT
CLOCK
VCC
GND
tsu
th
SERIAL SHIFT/
PARALLEL
LOAD
50%
SHIFT
CLOCK
VCC
GND
tsu
Figure 7.
Figure 8.
Figure 9.
Figure 10. Test Circuit
Switching Waveforms
Figure 11. Test Circuit
*Includes all probe and jig capacitance.
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
CONNECT TO VCC WHEN
TESTING tPLZ AND tPZL.
CONNECT TO GND WHEN
TESTING tPHZ AND tPZH.
1 kW
DATA
VALID
Pin Descriptions
Data Inputs
A, B, C, D, E, F, G, H (Pins 15, 1, 2, 3, 4, 5, 6, 7)
Parallel data inputs. Data on these inputs are stored in the
data latch on the rising edge of the Latch Clock input.
SA (Pin 14)
Serial data input. Data on this input is shifted into the shift
register on the rising edge of the Shift Clock input if Serial
Shift/Parallel Load is high. Data on this input is ignored
when Serial Shift/Parallel Load is low.
Control Inputs
Serial Shift/Parallel Load (Pin 13)
Shift register mode control. When a high level is applied
to this pin, the shift register is allowed to serially shift data.
When a low level is applied to this pin, the shift register
accepts parallel data from the data latch.
Shift Clock (Pin 11)
Serial shift clock. A lowtohigh transition on this input
shifts data on the serial data input into the shift register and
data in stage H is shifted out QH, being replaced by the data
previously stored in stage G.
Latch Clock (Pin 12)
Data latch clock. A lowtohigh transition on this input
loads the parallel data on inputs AH into the data latch.
Output Enable (Pin 10)
Activelow output enable A high level applied to this pin
forces the QH output into the high impedance state. A low
level enables the output. This control does not affect the state
of the input latch or the shift register.
Output
QH (Pin 9)
Serial data output. This pin is the output from the last stage
of the shift register. This is a 3state output.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MC74HC589AN | 功能描述:计数器移位寄存器 8-Bit 3 State Shift RoHS:否 制造商:Texas Instruments 计数器类型: 计数顺序:Serial to Serial/Parallel 电路数量:1 封装 / 箱体:SOIC-20 Wide 逻辑系列: 逻辑类型: 输入线路数量:1 输出类型:Open Drain 传播延迟时间:650 ns 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装:Reel |
| MC74HC589ANG | 功能描述:计数器移位寄存器 8-Bit 3 State Shift RoHS:否 制造商:Texas Instruments 计数器类型: 计数顺序:Serial to Serial/Parallel 电路数量:1 封装 / 箱体:SOIC-20 Wide 逻辑系列: 逻辑类型: 输入线路数量:1 输出类型:Open Drain 传播延迟时间:650 ns 最大工作温度:+ 125 C 最小工作温度:- 40 C 封装:Reel |
| MC74HC589ANG | 制造商:ON Semiconductor 功能描述:Gate / Inverter Logic IC |
| MC74HC589N | 制造商:Freescale Semiconductor 功能描述: |
| MC74HC58DR2 | 制造商:Motorola Inc 功能描述:HC/UH SERIES, DUAL 6-INPUT AND-OR GATE, PDSO14 |
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