参数资料
型号: MC74LCX05DTR2
厂商: ON SEMICONDUCTOR
元件分类: 门电路
英文描述: LVC/LCX/Z SERIES, HEX 1-INPUT INVERT GATE, PDSO14
封装: PLASTIC, TSSOP-14
文件页数: 15/37页
文件大小: 339K
代理商: MC74LCX05DTR2
Design Considerations
LCX DATA
BR1339 — REV 3
23
MOTOROLA
VOL
T
AGE
(V)
TIME (ns) (5.0 ns/DIV)
Figure 17. Reverse Crosstalk on PCB Traces
0.0 V
Key
Vertical Scale
Horizontal Scale
Active Driver
1.0 V/Div
50 ns/Div
Forward Crosstalk
0.2 V/Div
5.0 ns/Div
Active Receiver
1.0 V/Div
5.0 ns/Div
This figure shows traces taken on a test fixture designed to exaggerate the
amplitude of crosstalk pulses.
Ground Bounce
Ground bounce occurs as a result of the intrinsic
characteristics of the leadframes and bondwires of the
packages used to house CMOS devices. As edge rates and
drive capability increase in advanced logic families, the effects
of these intrinsic electrical characteristics become more
pronounced.
Figure 18 shows a simple circuit model for a device in a
leadframe driving a standard test load. The inductor L1
represents the parasitic inductance in the ground lead of the
package; inductor L2 represents the parasitic inductance in
the power lead of the package; inductor L3 represents the
parasitic inductance in the output lead of the package; the
resistor R1 represents the output impedance of the device
output, and the capacitor and resistor CL and RL represent the
standard test load on the output of the device.
Figure 18. Output Model
VCC
L2
L3
I
R1
L1
CL
RL
Figure 19. Output Voltage
Figure 20. Output Current
Figure 21. Inductor Voltage
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