参数资料
型号: MC74VHC1GT86DTT3
厂商: ON SEMICONDUCTOR
元件分类: 门电路
英文描述: AHC/VHC SERIES, 2-INPUT XOR GATE, PDSO5
封装: SC-59, SOT-23, TSOP-5
文件页数: 1/12页
文件大小: 122K
代理商: MC74VHC1GT86DTT3
Semiconductor Components Industries, LLC, 2001
April, 2001 – Rev. 7
1
Publication Order Number:
MC74VHC1GT86/D
MC74VHC1GT86
2-Input Exclusive OR Gate /
CMOS Logic Level Shifter
with LSTTL–Compatible Inputs
The MC74VHC1GT86 is an advanced high speed CMOS 2–input
Exclusive OR gate fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and the
output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic–level translator from 3.0 V
CMOS logic to 5.0V CMOS Logic or from 1.8 V CMOS logic to 3.0 V
CMOS Logic while operating at the high–voltage power supply.
The MC74VHC1GT86 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT86 to be used to interface 5 V circuits to 3 V
circuits. The output structures also provide protection when VCC = 0 V.
These input and output structures help prevent device destruction caused
by supply voltage – input/output voltage mismatch, battery backup, hot
insertion, etc.
High Speed: t
PD = 4.8 ns (Typ) at VCC = 5 V
Low Power Dissipation: I
CC = 2 A (Max) at TA = 25°C
TTL–Compatible Inputs: V
IL = 0.8 V; VIH = 2.0 V
CMOS–Compatible Outputs: V
OH > 0.8 VCC; VOL < 0.1 VCC @Load
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 83; Equivalent Gates = 16
Figure 1. Pinout (Top View)
IN A
OUT Y
= 1
IN B
VCC
IN B
IN A
OUT Y
GND
Figure 2. Logic Symbol
1
2
3
4
5
PIN ASSIGNMENT
1
2
3
GND
IN B
IN A
http://onsemi.com
4
5VCC
OUT Y
L
H
L
H
L
H
FUNCTION TABLE
Inputs
Output
AB
L
H
L
Y
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
SC–88A / SOT–353/SC–70
DF SUFFIX
CASE 419A
Pin 1
d = Date Code
VMd
TSOP–5/SOT–23/SC–59
DT SUFFIX
CASE 483
Pin 1
d = Date Code
VMd
MARKING
DIAGRAMS
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