参数资料
型号: MC74VHCT157AD
厂商: MOTOROLA INC
元件分类: 编、解码器及复用、解复用
英文描述: AHCT/VHCT SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, TRUE OUTPUT, PDSO16
封装: SOIC-16
文件页数: 1/8页
文件大小: 199K
代理商: MC74VHCT157AD
Semiconductor Components Industries, LLC, 2000
May, 2000 – Rev. 0
1
Publication Order Number:
MC74VHCT157A/D
MC74VHCT157A
Advance Information
Quad 2-Channel Multiplexer
The MC74VHCT157A is an advanced high speed CMOS quad
2–channel multiplexer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
It consists of four 2–input digital multiplexers with common select (S)
and enable (E) inputs. When E is held High, selection of data is inhibited
and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed to
the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can be
used as a level converter for interfacing 3.3 V to 5.0 V because it has full
5 V CMOS level output swings.
The VHCT157A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage. The
output structures also provide protection when VCC = 0 V. These input and
output structures help prevent device destruction caused by supply
voltage—input/output voltage mismatch, battery backup, hot insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The inputs
tolerate voltages up to 7V, allowing the interface of 5V systems to 3V
systems.
High Speed: tPD = 4.1ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4A (Max) at TA = 25°C
TTL–Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 2V to 5.5V Operating Range
Low Noise: VOLP = 0.8V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 82 FETs or 20 Equivalent Gates
PIN ASSIGNMENT
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
S
Y0
B0
A0
Y1
B1
A1
GND
Y3
B3
A3
E
VCC
B2
A2
Y2
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
http://onsemi.com
Device
Package
Shipping
ORDERING INFORMATION
MC74VHCT157AD
SOIC–16
55 Units/Rail
MARKING DIAGRAMS
MC74VHCT157ADT TSSOP–16
96 Units/Rail
MC74VHCT157AM
SOIC
EIAJ–16
50 Units/Rail
A = Assembly Location
L
= Wafer Lot
Y = Year
W = Work Week
A
= Assembly Location
WL = Wafer Lot
Y
= Year
WW = Work Week
SOIC–14
D SUFFIX
CASE 751A
TSSOP–14
DT SUFFIX
CASE 948G
SOIC EIAJ–14
M SUFFIX
CASE 965
1
7
8
14
8
14
7
1
14
8
7
VHCT157A
AWLYWW
VHCT
157A
AWLYWW
VHCT157A
ALYW
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