参数资料
型号: MC74VHCT245AM
厂商: ON SEMICONDUCTOR
元件分类: 总线收发器
英文描述: Octal Bus Transceiver
中文描述: AHCT/VHCT SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO20
封装: EIAJ, SOIC-20
文件页数: 1/4页
文件大小: 106K
代理商: MC74VHCT245AM
Octal Bus Transceiver
The MC74VHCT245A is an advanced high speed CMOS octal bus
transceiver fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
It is intended for two–way asynchronous communication between
data buses. The direction of data transmission is determined by the
level of the DIR input. The output enable pin (OE) can be used to
disable the device, so that the buses are effectively isolated.
All inputs are equipped with protection circuits against static
discharge.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3V to 5.0V, because it has
full 5V CMOS level output swings.
The VHCT245A input and output (when disabled) structures
provide protection when voltages between 0V and 5.5V are applied,
regardless of the supply voltage. These input and output structures
help prevent device destruction caused by supply voltage –
input/output voltage mismatch, battery backup, hot insertion, etc.
High Speed: tPD = 4.9ns (Typ) at VCC = 5V
Low Power Dissipation: ICC = 4A (Max) at TA = 25°C
TTL–Compatible Inputs: VIL = 0.8V; VIH = 2.0V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 4.5V to 5.5V Operating Range
Low Noise: VOLP = 1.6V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300mA
ESD Performance: HBM > 2000V; Machine Model > 200V
Chip Complexity: 304 FETs or 76 Equivalent Gates
APPLICATION NOTES
Do not force a signal on an I/O pin when it is an active output,
damage may occur.
All floating (high impedance) input or I/O pins must be fixed by
means of pull up or pull down resistors or bus terminator ICs.
ON Semiconductort
MC74VHCT245A
DW SUFFIX
20–LEAD SOIC WIDE PACKAGE
CASE 751D–05
ORDERING INFORMATION
MC74VHCTXXXADW
MC74VHCTXXXADT
MC74VHCTXXXAM
SOIC WIDE
TSSOP
SOIC EIAJ
DT SUFFIX
20–LEAD TSSOP PACKAGE
CASE 948E–02
M SUFFIX
20–LEAD SOIC EIAJ PACKAGE
CASE 967–01
Figure 1. Logic Diagram
A
DATA
PORT
A8
A7
A6
A5
A3
A4
A2
A1
9
8
7
6
5
4
3
2
DIR
OE
1
19
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
B
DATA
PORT
Figure 2. Pin Assignment
A5
A3
A2
A1
DIR
GND
A8
A7
A6
A4
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
B3
B2
B1
OE
VCC
B8
B7
B6
B5
B4
OE
DIR
Operation
L
H
L
H
X
Data Tx from Bus B to Bus A
Data Tx from Bus A to Bus B
Buses Isolated (High–Z State)
Control Inputs
FUNCTION TABLE
Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 3
172
Publication Order Number:
MC74VHCT245A/D
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