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Monitor Module (MON)
MC68HC908GZ60 MC68HC908GZ48 MC68HC908GZ32 Data Sheet, Rev. 5
Freescale Semiconductor
303
20.3 Monitor Module (MON)
The monitor module allows debugging and programming of the microcontroller unit (MCU) through a
single-wire interface with a host computer. Monitor mode entry can be achieved without use of the higher
test voltage, VTST, as long as vector addresses $FFFE and $FFFF are blank, thus reducing the hardware
requirements for in-circuit programming.
Features of the monitor module include:
Normal user-mode pin functionality
One pin dedicated to serial communication between MCU and host computer
Standard non-return-to-zero (NRZ) communication with host computer
Standard communication baud rate (7200 @ 2-MHz bus frequency)
Execution of code in random-access memory (RAM) or FLASH
FLASH memory security feature(1)
FLASH memory programming interface
Monitor mode entry without high voltage, VTST, if reset vector is blank ($FFFE and $FFFF contain
$FF)
Normal monitor mode entry if VTST is applied to IRQ
20.3.1 Functional Description
Figure 20-9 shows a simplified diagram of the monitor mode.
The monitor module receives and executes commands from a host computer.
a host computer via a standard RS-232 interface.
Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
Table 20-1 shows the pin conditions for entering monitor mode. As specified in the table, monitor mode
may be entered after a power-on reset (POR) and will allow communication at 7200 baud provided one
of the following sets of conditions is met:
If $FFFE and $FFFF does not contain $FF (programmed state):
–
The external clock is 4.0 MHz (7200 baud)
–PTB4 = low
–IRQ = VTST
If $FFFE and $FFFF do not contain $FF (programmed state):
–
The external clock is 8.0 MHz (7200 baud)
–
PTB4 = high
–
IRQ = VTST
If $FFFE and $FFFF contain $FF (erased state):
–
The external clock is 8.0 MHz (7200 baud)
–IRQ = VDD (this can be implemented through the internal IRQ pullup) or VSS
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or copying the FLASH difficult for
unauthorized users.