
Electrical Specifications
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 6
218
Freescale Semiconductor
17.15 Memory Characteristics
Characteristic
Symbol
Min
Typ
Max
Unit
RAM data retention voltage (1)
1. Values are based on characterization results, not tested in production.
VRDR
1.3
—
V
FLASH program bus clock frequency
—
1
—
MHz
FLASH PGM/ERASE supply voltage (VDD)VPGM/ERASE
2.7
—
5.5
V
FLASH read bus clock frequency
fRead
(2)
2. fRead is defined as the frequency range for which the FLASH memory can be read.
0—
8 M
Hz
FLASH page erase time
<1 K cycles
>1 K cycles
tErase
0.9
3.6
1
4
1.1
5.5
ms
FLASH mass erase time
tMErase
4—
—
ms
FLASH PGM/ERASE to HVEN setup time
tNVS
10
—
s
FLASH high-voltage hold time
tNVH
5—
—
s
FLASH high-voltage hold time (mass erase)
tNVHL
100
—
s
FLASH program hold time
tPGS
5—
—
s
FLASH program time
tPROG
30
—
40
s
FLASH return to read time
tRCV
(3)
3. tRCV is defined as the time it needs before the FLASH can be read after turning off the high voltage charge pump, by
clearing HVEN to 0.
1—
—
s
FLASH cumulative program hv period
tHV
(4)
4. tHV is defined as the cumulative high voltage programming time to the same row before next erase.
tHV must satisfy this condition: tNVS + tNVH + tPGS + (tPROG x 32) ≤ tHV maximum.
——
4
ms
FLASH endurance(5)
5. Typical endurance was evaluated for this product family. For additional information on how Freescale Semiconductor
defines Typical Endurance, please refer to Engineering Bulletin EB619.
—
10 k
100 k
—
Cycles
FLASH data retention time(6)
6. Typical data retention values are based on intrinsic capability of the technology measured at high temperature and de-rated
to 25°C using the Arrhenius equation. For additional information on how Freescale Semiconductor defines Typical Data
Retention, please refer to Engineering Bulletin EB618.
—
15
100
—
Years