参数资料
型号: MC9328MX1DVM20
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 200 MHz, RISC PROCESSOR, PBGA256
封装: 14 X 14 MM, 1.30 MM HEIGHT, 0.80 MM PITCH, MAPBGA-256
文件页数: 64/94页
文件大小: 1487K
代理商: MC9328MX1DVM20
Specifications
MOTOROLA
MC9328MX1 Advance Information
67
3.14.2 SDIO-IRQ and ReadWait Service Handling
In SDIO, there is a 1-bit or 4-bit interrupt response from the SDIO peripheral card. In 1-bit mode, the
interrupt response is simply that the SD_DAT[1] line is held low. The SD_DAT[1] line is not used as data
in this mode. The memory controller generates an interrupt according to this low and the system interrupt
continues until the source is removed (SD_DAT[1] returns to its high level).
In 4-bit mode, the interrupt is less simple. The interrupt triggers at a particular period called the "Interrupt
Period" during the data access, and the controller must sample SD_DAT[1] during this short period to
determine the IRQ status of the attached card. The interrupt period only happens at the boundary of each
block (512 bytes).
Figure 53. SDIO IRQ Timing Diagram
ReadWait is another feature in SDIO that allows the user to submit commands during the data transfer. In
this mode, the block temporarily pauses the data transfer operation counter and related status, yet keeps the
clock running, and allows the user to submit commands as normal. After all commands are submitted, the
user can switch back to the data transfer operation and all counter and status values are resumed as access
continues.
Table 31. Timing Values for Figure 48 through Figure 52
Parameter
Symbol
Minimum
Maximum
Unit
MMC/SD bus clock, CLK (All values are referred to minimum (VIH) and maximum (VIL)
Command response cycle
NCR
2
64
Clock cycles
Identification response cycle
NID
5
Clock cycles
Access time delay cycle
NAC
2
TAAC + NSAC
Clock cycles
Command read cycle
NRC
8
Clock cycles
Command-command cycle
NCC
8
Clock cycles
Command write cycle
NWR
2
Clock cycles
Stop transmission cycle
NST
2
Clock cycles
TAAC: Data read access time -1 defined in CSD register bit[119:112]
NSAC: Data read access time -2 in CLK cycles (NSAC100) defined in CSD register bit[111:104]
Interrupt Period
IRQ
DAT[1]
For 4-bit
L H
Interrupt Period
DAT[1]
For 1-bit
CMD
Content
S T
E Z Z P
E Z Z
******
Z Z
Response
CRC
S
Z
E
S
Block Data
E
S
Block Data
相关PDF资料
PDF描述
M30290M6-XXXHP 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP80
M902-01-187.5000 187.5 MHz, OTHER CLOCK GENERATOR, CQCC36
M906-01I125.2500 125 MHz, OTHER CLOCK GENERATOR, CQCC36
MC9S08GT32ACB MICROPROCESSOR, PDIP42
MSP430F1101AIRGER 16-BIT, FLASH, 8 MHz, RISC MICROCONTROLLER, PQCC24
相关代理商/技术参数
参数描述
MC9328MX1DVM20R2 功能描述:处理器 - 专门应用 DRAGONBALL MX1 RoHS:否 制造商:Freescale Semiconductor 类型:Multimedia Applications 核心:ARM Cortex A9 处理器系列:i.MX6 数据总线宽度:32 bit 最大时钟频率:1 GHz 指令/数据缓存: 数据 RAM 大小:128 KB 数据 ROM 大小: 工作电源电压: 最大工作温度:+ 95 C 安装风格:SMD/SMT 封装 / 箱体:MAPBGA-432
MC9328MX1P/D 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor
MC9328MX1S 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor
MC9328MX1SRM/D 制造商:FREESCALE 制造商全称:Freescale Semiconductor, Inc 功能描述:i.MX Integrated Portable System Processor
MC9328MX1VH20 功能描述:IC MCU I.MX 200MHZ 256-MAPBGA RoHS:否 类别:集成电路 (IC) >> 嵌入式 - 微控制器, 系列:i.MX1 标准包装:250 系列:56F8xxx 核心处理器:56800E 芯体尺寸:16-位 速度:60MHz 连通性:CAN,SCI,SPI 外围设备:POR,PWM,温度传感器,WDT 输入/输出数:21 程序存储器容量:40KB(20K x 16) 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:6K x 16 电压 - 电源 (Vcc/Vdd):2.25 V ~ 3.6 V 数据转换器:A/D 6x12b 振荡器型:内部 工作温度:-40°C ~ 125°C 封装/外壳:48-LQFP 包装:托盘 配用:MC56F8323EVME-ND - BOARD EVALUATION MC56F8323