参数资料
型号: MC9S08LL8CGT
厂商: Freescale Semiconductor
文件页数: 4/44页
文件大小: 0K
描述: IC MCU 8BIT 10KB FLASH 48-QFN
产品培训模块: LCD Design Solutions
MC9S08LL64/36 LCD MCU Introduction
标准包装: 260
系列: S08
核心处理器: S08
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SCI,SPI
外围设备: LCD,LVD,POR,PWM,WDT
输入/输出数: 31
程序存储器容量: 10KB(10K x 8)
程序存储器类型: 闪存
RAM 容量: 2K x 8
电压 - 电源 (Vcc/Vdd): 1.8 V ~ 3.6 V
数据转换器: A/D 8x12b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 48-VFQFN 裸露焊盘
包装: 托盘
产品目录页面: 727 (CN2011-ZH PDF)
MC9S08LL16 Series MCU Data Sheet, Rev. 7
Electrical Characteristics
Freescale Semiconductor
12
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving Equation 3-1 and Equation 3-2 iteratively for any value of TA.
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be taken to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification, ESD stresses were performed for the human body
model (HBM), the machine model (MM) and the charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless instructed otherwise in the device
specification.
Table 6. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human
Body Model
Series resistance
R1
1500
Ω
Storage capacitance
C
100
pF
Number of pulses per pin
3
Charge
Device
Model
Series resistance
R1
0
Ω
Storage capacitance
C
200
pF
Number of pulses per pin
3
Latch-up
Minimum input voltage limit
–2.5
V
Maximum input voltage limit
7.5
V
Table 7. ESD and Latch-Up Protection Characteristics
No.
Rating1
1 Parameter is achieved by design characterization on a small sample size from typical devices
under typical conditions unless otherwise noted.
Symbol
Min
Max
Unit
1
Human body model (HBM)
VHBM
±2000
V
2
Charge device model (CDM)
VCDM
±500
V
3
Latch-up current at TA = 85°CILAT
±100
mA
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