参数资料
型号: MC9S12B128VFU25
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP80
封装: PLASTIC, QFP-80
文件页数: 25/132页
文件大小: 1842K
代理商: MC9S12B128VFU25
Device User Guide — 9S12B128DGV1/D V01.13
120
Figure A-8 SPI Master Timing (CPHA=1)
In Table A-24 the timing characteristics for master mode are listed.
Table A-24 SPI Master Mode Timing Characteristics
Num
Characteristic
Symbol
Unit
Min
Typ
Max
1
SCK Frequency
fsck
1/2048
1
/2
fbus
1
SCK Period
tsck
2
2048
tbus
2
Enable Lead Time
tlead
1/2
tsck
3
Enable Lag Time
tlag
1/2
tsck
4
Clock (SCK) High or Low Time
twsck
1/2
tsck
5
Data Setup Time (Inputs)
tsu
8—
ns
6
Data Hold Time (Inputs)
thi
8—
ns
9
Data Valid after SCK Edge
tvsck
30
ns
10
Data Valid after SS fall (CPHA=0)
tvss
15
ns
11
Data Hold Time (Outputs)
tho
20
ns
12
Rise and Fall Time Inputs
tr
——
8
ns
13
Rise and Fall Time Outputs
trfo
——
8
ns
SCK
(OUTPUT)
SCK
(OUTPUT)
MISO
(INPUT)
MOSI
(OUTPUT)
1
5
6
MSB IN2
BIT 6 . . . 1
LSB IN
MASTER MSB OUT2
MASTER LSB OUT
BIT 6 . . . 1
4
9
12
13
11
PORT DATA
(CPOL
= 0)
(CPOL
= 1)
PORT DATA
SS1
(OUTPUT)
2
12
13
3
1.If configured as output
2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, ..., bit 6, MSB.
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