参数资料
型号: MC9S12C32PVFA16
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP48
封装: PLASTIC, LQFP-48
文件页数: 60/116页
文件大小: 1882K
代理商: MC9S12C32PVFA16
Device User Guide — 9S12C32DGV1/D V01.14
2.3.10 PE5 / MODA / IPIPE0 — Port E I/O Pin 5
PE5 is a general purpose input or output pin. It is used as a MCU operating mode select pin during reset.
The state of this pin is latched to the MODA bit at the rising edge of RESET. This pin is shared with the
instruction queue tracking signal IPIPE0. This pin is an input with a pull-down device which is only active
when RESET is low. This pin is not available in the 48 / 52 pin package versions.
2.3.11 PE4 / ECLK— Port E I/O Pin [4] / E-Clock Output
ECLK is the output connection for the internal bus clock. It is used to demultiplex the address and data in
expanded modes and is used as a timing reference. ECLK frequency is equal to 1/2 the crystal frequency
out of reset. The ECLK pin is initially configured as ECLK output with stretch in all expanded modes. The
E clock output function depends upon the settings of the NECLK bit in the PEAR register, the IVIS bit in
the MODE register and the ESTR bit in the EBICTL register. All clocks, including the E clock, are halted
when the MCU is in STOP mode. It is possible to configure the MCU to interface to slow external
memory. ECLK can be stretched for such accesses. Reference the MISC register (EXSTR[1:0] bits) for
more information. In normal expanded narrow mode, the E clock is available for use in external select
decode logic or as a constant speed clock for use in the external application system.
2.3.12 PE3 / LSTRB — Port E I/O Pin [3] / Low-Byte Strobe (LSTRB)
In all modes this pin can be used as a general-purpose I/O and is an input with an active pull-up out of
reset. If the strobe function is required, it should be enabled by setting the LSTRE bit in the PEAR register.
This signal is used in write operations. Therefore external low byte writes will not be possible until this
function is enabled. This pin is also used as TAGLO in Special Expanded modes and is multiplexed with
the LSTRB function. This pin is not available in the 48 / 52 pin package versions.
2.3.13 PE2 / R/W — Port E I/O Pin [2] / Read/Write
In all modes this pin can be used as a general-purpose I/O and is an input with an active pull-up out of
reset. If the read/write function is required it should be enabled by setting the RDWE bit in the PEAR
register. External writes will not be possible until enabled. This pin is not available in the 48 / 52 pin
package versions.
2.3.14 PE1 / IRQ — Port E input Pin [1] / Maskable Interrupt Pin
The IRQ input provides a means of applying asynchronous interrupt requests to the MCU. Either falling
edge-sensitive triggering or level-sensitive triggering is program selectable (INTCR register). IRQ is
always enabled and configured to level-sensitive triggering out of reset. It can be disabled by clearing
IRQEN bit (INTCR register). When the MCU is reset the IRQ function is masked in the condition code
register. This pin is always an input and can always be read. There is an active pull-up on this pin while in
reset and immediately out of reset. The pull-up can be turned off by clearing PUPEE in the PUCR register.
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