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Subscribe MC9S12XA256 : Microcontroller
The S12X family will retain the low cost, power consumption, EMC and code-size efficiency
advantages currently enjoyed by users of the existing 16-bit HCS12 MCU family. Based
around an enhanced HCS12 core, the S12X family is designed to deliver 2 to 5 times the
performance of a 25 MHz HCS12 whilst retaining a high degree of pin and code
compatibility with the HCS12. The S12X family introduces the performance boosting
XGATE module. Using enhance DMA functionality, this parallel processing module
offloads the CPU by providing high speed data processing and transfer between peripheral
modules, RAM and I/O ports. Providing up to 80MIPS of performance additional to the
CPU, the XGATE can access all peripherals and the RAM block.
MC9S12XA256 Features
HCS12X Core
16-bit HCS12X CPU
1. Upward compatible with HCS12 instruction set
2. Interrupt stacking and programmer's model identical to HCS12
3. Instruction queue
4. Enhanced indexed addressing
5. Enhanced instruction set
EBI (External Bus Interface)
MMC (Module Mapping Control)
INT (Interrupt Controller)
DBG (Debug module to monitor HCS12X CPU and XGATE bus activity)
BDM (Background Debug Mode)
XGATE
Peripheral Co-Processor
Parallel processing module offloads the CPU by providing high speed data
processing transfer between peripheral modules, RAM and I/O ports
Data transfer between Flash EEPROM, peripheral modules and I/O ports
PIT Periodic Interrupt Timer
Four Timers with independent time-out periods
Time-out periods selectable between 1 and 224 bus clock cycles
CRG
Low Noise/Low Power Pierce oscillator
PLL
COP watchdog
Real time interrupt
Clock monitor
Fast wake-up from STOP mode
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MC9S12XA256 Product Summary Page
31-Oct-2006
file://Z:\LCSOURCING\sourced_files_from_LCM\FSCL_MC9S12XA256 Product Summary Page.htm