
Signal Description
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MCF5206 USERS MANUAL Rev 1.0
MOTOROLA
bypass command. When this occurs, all the JTAG logic is benign and does not interfere
with the normal functionality of the MCF5206 processor. Although this signal is
asynchronous, we recommend that TRST make only a 0 to 1 (asserted to negated)
transition while TMS is held at a logic 1 value. TRST has an internal pullup so that if it is
not driven low, its value defaults to a logic level of 1. However, if JTAG is not being used,
TRST can either be tied to ground, placing the JTAG controller in the test logic reset state
immediately, or tied to VDD, causing the JTAG controller (if TMS is a logic 1) to eventually
end up in the test logic reset state after five clocks of TCK.
2.14.3 Test Mode Select (TMS/BKPT)
The MTMOD signal determines the function of this dual-purpose pin. If MTMOD = 0, then
the TMS function is selected. If MTMOD =1, the BKPT function is selected. MTMOD
should not change while RSTI = 1.
The TMS input signal provides the JTAG controller with information to determine which
test operation should be performed. The value of TMS and the current state of the internal
16-state JTAG controller state machine at the rising edge of TCK determine whether the
JTAG controller holds its current state or advances to the next state. This directly controls
whether JTAG data or instruction operations occur. TMS has an internal pullup so that if
it is not driven low, its value defaults to a logic level of 1. However, if TMS is not being
used, it should be tied to VDD.
2.14.4 Test Data Input (TDI/DSI)
The MTMOD signal determines the function of this dual-purpose pin. If MTMOD = 0, then
TDI is selected. If MTMOD = 1, then DSI is selected. MTMOD should not change while
RSTI = 1.
The TDI input signal provides the serial data port for loading the various JTAG shift
registers (the boundary scan register, the bypass register, and the instruction register).
Shifting in of data depends on the state of the JTAG controller state machine and the
instruction currently in the instruction register. This data shift occurs on the rising edge of
TCK. TDI also has an internal pullup so that if it is not driven low, its value defaults to a
logic level of 1. However, if TDI is not being used, it should be tied to VDD.
2.14.5 Test Data Output (TDO/DSO)
The MTMOD signal determines the function of this dual-purpose pin. When MTMOD = 0,
TDO is selected. When MTMOD = 1, then DSO is selected. MTMOD should not change
while RSTI = 1.
The TDO output signal provides the serial data port for outputting data from the JTAG
logic. Shifting out of data depends on the state of the JTAG controller state machine and
the instruction currently in the instruction register. This data shift occurs on the falling edge
of TCK. When TDO is not outputting test data, it is placed in a high-impedence state. TDO
can also be three-stated to allow bussed or parallel connections to other devices having
JTAG.
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Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
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