
MOTOROLA
MCF523x Integrated Microprocessor Hardware Specifications
53
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Oscillator and PLLMRFM Electrical Characteris-
6.4
Oscillator and PLLMRFM Electrical
Characteristics
5
Current measured at maximum system clock frequency, all modules active, and default drive strength with matching
load.
6
All functional non-supply pins are internally clamped to VSS and their respective VDD.
7
Input must be current limited to the value specified. To determine the value of the required current-limiting resistor,
calculate resistance values for positive and negative clamp voltages, then use the larger of the two values.
8
Power supply must maintain regulation within operating VDD range during instantaneous and operating maximum
current conditions. If positive injection current (Vin > VDD) is greater than IDD, the injection current may flow out of VDD
and could result in external power supply going out of regulation. Insure external VDD load will shunt current greater
than maximum injection current. This will be the greatest risk when the processor is not consuming power. Examples
are: if no system clock is present, or if clock rate is very low which would reduce overall power consumption. Also, at
power-up, system clock is not present during the power-up sequence until the PLL has attained lock.
Table 45. HiP7 PLLMRFM Electrical Specifications 1
Num
Characteristic
Symbol
Min.
Value
Max.
Value
Unit
1
PLL Reference Frequency Range
Crystal reference
External reference
1:1 mode (NOTE: fsys/2 = 2 × fref_1:1)
fref_crystal
fref_ext
fref_1:1
8
24
25
75
MHz
2
Core frequency
CLKOUT Frequency 2
External reference
On-Chip PLL Frequency
fsys
fsys/2
0
fref ÷ 32
150
75
MHz
MHZ
MHz
3
Loss of Reference Frequency 3, 5
fLOR
100
1000
kHz
4
Self Clocked Mode Frequency 4, 5
fSCM
TBD
MHz
5
Crystal Start-up Time 5, 6
tcst
—
10
ms
6
EXTAL Input High Voltage
Crystal Mode 7
All other modes (Dual Controller (1:1),
Bypass, External)
VIHEXT
TBD
V
7
EXTAL Input Low Voltage
Crystal Mode7
All other modes (Dual Controller (1:1),
Bypass, External)
VILEXT
TBD
V
8
XTAL Output High Voltage
I
OH
= 1.0 mA
V
OH
TBD
—
V
9
XTAL Output Low Voltage
I
OL
= 1.0 mA
V
OL
—
TBD
V
10
XTAL Load Capacitance5
5
30
pF
11
PLL Lock Time 5, 8,14
tlpll
—
750
s
12
Power-up To Lock Time 5, 6, 9
With Crystal Reference (includes
5 time)
Without Crystal Reference 10
tlplk
—
11
750
ms
s