Pin assignments and reset states
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 8
Freescale Semiconductor
17
VSSA_ADC
—
——
—
vssint
—
H5
VDDA_DAC_ADC
—
——
—
vddint
—
J4
VSSA_DAC_ADC
—
——
—
vssint
—
J5
VSTBY24
——
—
vddint
E14
E16
VSS
—
A1, A14,
D8, D14,
E8, F8, G4,
G8, G9,
G11, H4,
H8–11,
J7–11, J14,
K5, K6,
K11, P1,
P14
A1, A16,
D16, E8,
F7, F8,
G6–G11,
H6, H7,
H9–H11,
J6, J11,
J12, K12,
L4, L7–L12,
M5, M6, T1,
T16
1 All pins available with GPIO contain a configurable pull-up/down. This column indicates the pull devices that are enabled
automatically at reset. Pull-ups are generally only enabled on pins with their primary function, except as noted.
2 Refers to pin’s primary function.
3 For details on the available slew rates of the various pad types see section “Output Pad Loading and Slew Rate” of the MCF5441x
Data Sheet or section “Slew Rate Control Registers (SRCR_x)” in chapter “Pin-Multiplexing and Control” of the MCF5441x Reference
Manual.
4 Enabled as input only in oscillator bypass mode (internal crystal oscillator is disabled).
5 These pins are time-division multiplexed between the FlexBus and NFC. An arbitration mechanism determines which module drives
these pins at any point in time.
6 An internal pulldown circuit is enabled during system reset for FB_AD[10].
7 An internal pullup circuit is enabled when the system is in reset state.
8 Configurable pull that is enabled and pulled up after reset.
9 When configured for FB_A1, this pin is time-division multiplexed between the FlexBus and NFC. An arbitration mechanism
determines which module drives the pin at any point in time. When not configured as FB_A1, NFC_ALE cannot be used.
10 When configured for FB_A0, this pin is time-division multiplexed between the FlexBus and NFC. An arbitration mechanism
determines which module drives the pin at any point in time. When not configured as FB_A0, NFC_CLE cannot be used.
11 Since USB_CLKIN is a clock signal, it must be dedicated to the USB system. Do not implement this pin as dual-use.
12 When Alternate 2 is selected, then internal pullup/pulldown control will come from the MISCCR[3] register of CIM.
13 When booting from serial boot flash, the SBF function is enabled automatically. After the SBF function completes its reset sequence,
the signals are returned to GPIO functionality.
14 Automatic pull-up when SBF controls the pin during reset only. Configurable pull when UART, DSPI, or SDHC control the pin.
15 If ULPI is enabled, ULPI_DIR is available as the Alternate 2 function. If ULPI is disabled, USBO_VBUS_EN is available.
16 If ULPI is enabled, ULPI_NXT is available as the Alternate 2 function. If ULPI is disabled, USBO_VBUS_OC is available.
17 When Alternate 2 is selected, then internal pullup/pulldown control will come from the MISCCR[2] register of CIM.
18 UARTx_TXD pad can act as RXD(input) pad when UART One Wire mode is enabled.
19 The SIM1 signals are available with 256 MAPBGA but are not available with 196 MAPBGA.
20 These RMII functions are selected by the mode chosen by the MAC-NET, not by the pin-multiplexing and control (GPIO) module.
Table 5. MCF5441x Signal information and muxing (continued)
Signal name
GPIO
Alternate 1
Alternate 2
Pu
llu
p
(U)
1
Pu
ll
d
o
wn
(D
)
Direc
tion
2
Vo
lt
a
g
e
d
o
m
a
in
Pa
d
t
y
p
e
3
1
96
MAPBGA
2
56
MAPBGA