参数资料
型号: MCIMX258CVM4
厂商: Freescale Semiconductor
文件页数: 11/153页
文件大小: 0K
描述: IC MPU I.MX25 IND 400MAPBGA
标准包装: 90
系列: i.MX25
核心处理器: ARM9
芯体尺寸: 32-位
速度: 400MHz
连通性: 1 线,CAN,EBI/EMI,以太网,I²C,MMC,智能卡,SPI,SSI,UART/USART,USB OTG
外围设备: DMA,I²S,LCD,POR,PWM,WDT
输入/输出数: 128
程序存储器类型: 外部程序存储器
RAM 容量: 144K x 8
电压 - 电源 (Vcc/Vdd): 1.15 V ~ 1.52 V
数据转换器: A/D 3x12b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 400-LFBGA
包装: 托盘
i.MX25 Applications Processor for Consumer and Industrial Products, Rev. 10
108
Freescale Semiconductor
Note:
All the timings for the SSI are given for a non-inverted serial clock polarity (TSCKP/RSCKP = 0) and a non-inverted frame sync
(TFSI/RFSI = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timing remains valid by inverting
the clock signal STCK/SRCK and/or the frame sync STFS/SRFS shown in the tables figures.
All timings are on pads when SSI is being used for data transfer.
”Tx” and “Rx” refer, respectively, to the transmit and receive sections of the SSI.
For internal frame sync operation using external clock, the FS timing is the same as that of Tx data (for example, during AC97
mode of operation).
Table 83. SSI Transmitter Timing with External Clock
ID
Parameter
Min.
Max.
Unit
External Clock Operation
SS22
(Tx/Rx) CK clock period
81.4
ns
SS23
(Tx/Rx) CK clock high period
36.0
ns
SS24
(Tx/Rx) CK clock rise time
6.0
ns
SS25
(Tx/Rx) CK clock low period
36.0
ns
SS26
(Tx/Rx) CK clock fall time
6.0
ns
SS27
FS (bl) low/ high setup before (Tx) CK falling
–10.0
15.0
ns
SS29
FS (bl) low/ high setup before (Tx) CK falling
10.0
ns
SS31
FS (wl) low/ high setup before (Tx) CK falling
–10.0
15.0
ns
SS33
FS (wl) low/ high setup before (Tx) CK falling
10.0
ns
SS37
(Tx) CK high to STXD valid from high impedance
15.0
ns
SS38
(Tx) CK high to STXD high/low
15.0
ns
SS39
(Tx) CK high to STXD high impedance
15.0
ns
Synchronous External Clock Operation
SS44
SRXD setup before (Tx) CK falling
10.0
ns
SS45
SRXD hold after (Tx) CK falling
2.0
ns
SS46
SRXD rise/fall time
6.0
ns
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