参数资料
型号: MCK12140D
厂商: ON SEMICONDUCTOR
元件分类: XO, clock
英文描述: Phase-Frequency Detector
中文描述: PHASE DETECTOR, 650 MHz, PDSO8
封装: SOIC-8
文件页数: 3/4页
文件大小: 49K
代理商: MCK12140D
MCH12140, MCK12140
http://onsemi.com
3
DC CHARACTERISTICS
(V
EE
= V
EE
(min) V
EE
(max); V
CC
= GND, unless otherwise noted.)
40
°
C
0
°
C
25
°
C
70
°
C
Characteristic
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Power Supply Current
H
K
I
EE
45
45
38
38
45
45
52
52
38
38
45
45
52
52
38
42
45
50
52
58
mA
Power Supply Voltage
H
K
V
EE
4.75
4.20
5.2
4.5
5.5
5.5
4.75
4.20
5.2
4.5
5.5
5.5
4.75
4.20
5.2
4.5
5.5
5.5
4.75
4.20
5.2
4.5
5.5
5.5
V
Input HIGH Current
I
IH
150
150
150
150
A
AC CHARACTERISTICS
(V
EE
= V
EE
(min) V
EE
(max); V
CC
= GND, unless otherwise noted.)
40
°
C
0
°
C
25
°
C
70
°
C
Characteristic
Symbol
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
Unit
Maximum Toggle Frequen-
cy
F
MAX
800
650
800
650
800
650
800
Propagation Delay
to Output
R to D
R to U
V to D
V to U
t
PLH
t
PHL
440
330
330
440
320
210
210
320
440
330
330
440
580
470
470
580
320
210
210
320
440
330
330
440
580
470
470
580
360
240
240
360
480
360
360
480
620
500
500
620
ps
Output Rise/Fall Times
Q (20 to 80%)
t
r
t
f
225
100
225
350
100
225
350
100
225
350
ps
APPLICATIONS INFORMATION
The 12140 is a high speed digital circuit used as a phase
comparator in an analog phase-locked loop. The device
determines the “lead” or “lag” phase relationship and time
difference between the leading edges of a VCO (V) signal
and a Reference (R) input. Since these edges occur only once
per cycle, the detector has a range of
±
2 radians.
The operation of the 12140 can best be described using the
plots of Figure 2. Figure 2 plots the average value of U, D
and the difference between U and D versus the phase
difference between the V and R inputs.
There are four potential relationships between V and R: R
lags or leads V and the frequency of R is less than or greater
than the frequency of V. Under these four conditions the
12140 will function as follows:
Figure 2. Average Output Voltage vs. Phase Difference
V
OH
V
OL
2
2
2
U
Fv > Fr
R lags V
V
OH
Fv < Fr
R leads V
V
OH
V
OL
2
D
V
OH
V
OH
V
OL
2
UD
V
OL
V
OH
2
2
2
2
2
R lags V in phase
When the R and V inputs are equal in frequency and the
phase of R lags that of V the U output will stay HIGH while
the D output will pulse from HIGH to LOW. The magnitude
of the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180
°
out of phase condition. The signal on D
indicates to the VCO to decrease in frequency to bring the
loop into lock.
V frequency > R frequency
When the frequency of V is greater than that of R the
12140 behaves in a similar fashion as above. Again the
signal on D indicates that the VCO frequency must be
decreased to bring the loop into lock.
R leads V in phase
When the R and V inputs are equal in frequency and the
phase of R leads that of V the D output will stay HIGH while
the U output pulses from HIGH to LOW. The magnitude of
the pulse will be proportional to the phase difference
between the V and R inputs reaching a minimum 50% duty
cycle under a 180
°
out of phase condition. The signal on U
indicates to the VCO to increase in frequency to bring the
loop into lock.
V frequency < R frequency
When the frequency of V is less than that of R the 12140
behaves in a similar fashion as above. Again the signal on U
indicates that the VCO frequency must be decreased to bring
the loop into lock.
From Figure 2 when V and R are at the same frequency and
in phase the value of U D is zero thus providing a zero error
voltage to the VCO. This situation indicates the loop is in lock
and the 12140 action will maintain the loop in its locked state.
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