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参数资料
| 型号： | MCM64PE32 |
| 厂商： | Motorola, Inc. |
| 英文描述： | 256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
| 中文描述： | 256K/512K流水线BurstRAM二级高速缓存模块奔腾 |
| 文件页数： | 5/12页 |
| 文件大小： | 190K |
| 代理商： | MCM64PE32 |
MCM64AF32
5
MOTOROLA FAST SRAM
TRUTH TABLE FOR TAG AND DATA RAMs
(X = Don’t Care)
COE
CWE
Mode
VCC Current
ICCA
ICCA
ICCA
Output
Cycle
H
H
Output Disabled
High–Z
—
L
H
Read
Dout
High–Z
Read Cycle
X
L
Write
Write Cycle
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
for Tag
for Data
VCC5
VCC3
– 0.5 to + 7.0
– 0.5 to + 5.0
V
Voltage Relative to VSS
Vin, Vout
– 0.5 to VCC
+ 0.5*
V
Output Current (per I/O)
Iout
Tbias
TA
Tstg
±
20
mA
Temperature Under Bias
– 10 to + 85
°
C
Operating Temperature
0 to + 70
°
C
Storage Temperature – Plastic
– 55 to + 125
°
C
* For data RAMs, VCC + 2.0 V ac to VSS – 2.0 V ac (pulse width
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for ex-
tended periods of time could affect device reliability.
20 ns).
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC3 = 3.3 V
±
5%, VCC5 = 5.0 V
±
5%, TA = 0 to + 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
(Voltages Referenced to VSS = 0 V)
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage (Operating Voltage Range)
Tag RAM
Data RAM and Latch
VCC
4.75
3.135
5.0
3.3
5.25
3.465
V
Input High Voltage
VIH
2.2
—
VCC + 0.3
*
V
Input Low Voltage
VIL
– 0.5
**
0.0
0.8
V
*For Tag, VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width
≤
20 ns).
For Data, VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width
≤
10% tAVAV (min)).
**For Tag, VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width
≤
20 ns).
For Data, VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width
≤
10% tAVAV (min)).
DC CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (COE = VIH, Vout = 0 to VCC)
TTL Output Low Voltage (IOL = + 8.0 mA)
TTL Output High Voltage (IOH = – 4.0 mA)
CMOS Output Low Voltage (IOL = 100
μ
A)
CMOS Output High Voltage (IOH = – 100
μ
A)
NOTE: NOTE: Good decoupling of the local power supply should always be used.
Ilkg(I)
Ilkg(O)
VOL
VOH
VOL2
VOH2
—
±
2
μ
A
—
±
2
μ
A
—
0.4
V
2.4
—
V
—
0.1
V
VCC – 0.1
—
V
POWER SUPPLY CURRENTS
Parameter
Symbol
Max
Unit
AC Active Supply Current (Iout = 0 mA, VCC = Max, f = fmax)
ICCA
780
mA
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
This CMOS memory circuit has been de-
signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.
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| MCM64PE32SDG66 | 制造商:MOTOROLA 制造商全称:Motorola, Inc 功能描述:256K/512K Pipelined BurstRAM Secondary Cache Module for Pentium |
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