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参数资料
| 型号： | MCP1630VT-E/MS |
| 厂商： | Microchip Technology |
| 文件页数： | 19/26页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST FLYBK ISO 8MSOP |
| 标准包装： | 1 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 占空比： | 75% |
| 电源电压： | 3 V ~ 5.5 V |
| 降压： | 是 |
| 升压： | 是 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 包装： | 剪切带 (CT) |
| 产品目录页面： | 668 (CN2011-ZH PDF) |
| 配用： | MCP1630DM-LED2-ND - BOARD DEM MCP1630 BOOST MODE LED MCP1630RD-NMC1-ND - REF DESIGN MCP1630 NIMH BATT CHG MCP1630RD-DDBK3-ND - REF DESIGN MCP1630V BI-DIR 4CELL MCP1630DM-DDBK4-ND - BOARD CONV DEMO MCP1630 TRPL-OUT MCP1630DM-DDBS2-ND - BOARD DEMO BOOST COUPLED INDUCTR MCP1630DM-DDBS1-ND - BOARD DEMO BOOST AUTO INPUT MCP1630DM-NMC1-ND - BOARD DEMO FOR MCP1630 |
| 其它名称： | MCP1630VT-E/MS-ND MCP1630VT-E/MSCT |
MCP1630/MCP1630V
8-Lead Plastic Dual Flat No Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated
For DFN samples, contact your Microchip Sales Office for availability..
p
D
b
n
L
E
EXPOSED
E2
PIN 1
ID INDEX
AREA
METAL
PAD
2
D2
1
(NOTE 2)
A3
TOP VIEW
A1
A
EXPOSED
TIE BAR
(NOTE 1)
BOTTOM VIEW
Units
INCHES
MILLIMETERS*
Dimension Limits
MIN
NOM
MAX
MIN
NOM
MAX
Number of Pins
Pitch
n
p
.020 BSC
8
0.50 BSC
8
Overall Height
Standoff
A
A1
.031
.000
.035
.001
.039
.002
0.80
0.00
0.90
0.02
1.00
0.05
Contact Thickness
Overall Length
A3
D
.008 REF.
.079 BSC
0.20 REF.
2.00 BSC
Exposed Pad Length
(Note 3)
D2
.055
.065
.067
1.39
1.65
1.70
Overall Width
E
.118 BSC
3.00 BSC
Exposed Pad Width
Contact Width
Contact Length
(Note 3)
E2
b
L
.047
.008
.012
.059
.010
.016
.061
.012
.020
1.20
0.20
0.30
1.50
0.25
0.40
1.55
0.30
0.50
*Controlling Parameter
Notes:
1. BSC: Basic Dimension. Theoretically exact value shown without tolerances.
See ASME Y14.5M
2. REF: Reference Dimension, usually without tolerance, for information purposes only.
See ASME Y14.5M
Exposed pad varies according to die attach paddle size.
Package may have one or more exposed tie bars at ends.
Pin 1 visual index feature may vary, but must be located within the hatched area.
JEDEC equivalent: M0-229
Drawing No. C04-123, Revised 05-05-05
? 2005 Microchip Technology Inc.
DS21896B-page 19
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