参数资料
型号: MCP1650RT-E/MS
厂商: Microchip Technology
文件页数: 14/28页
文件大小: 0K
描述: IC REG CTRLR BST FLYBK PWM 8MSOP
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 850kHz
占空比: 80%
电源电压: 2.7 V ~ 5.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 8-TSSOP,8-MSOP(0.118",3.00mm 宽)
包装: 带卷 (TR)
配用: MCP1650EV-ND - BOARD EVAL FOR MCP1650,51,52,53
MCP1650DM-LED1-ND - BOARD DEMO FOR MCP165X
MCP1650/51/52/53
4.7
FB Pin
4.11
Low Battery Detect
The output voltage is fed back through a resistor divider
to the FB pin. It is then compared to an internal 1.22V
reference. When the divided-down output is below the
internal reference, the internal oscillator is gated on
and the EXT pin pulses the external N-channel
MOSFET on and off to transfer energy from the source
to the load at 750 kHz. This will cause the output volt-
age to rise until it is above the 1.22V threshold, thereby
gating the internal oscillator off. Hysteresis is provided
within the comparator and is typically 12 mV. The rate
at which the oscillator is gated on and off is determined
by the input voltage, load current, hysteresis voltage
and inductance. The output ripple voltage will vary
depending on the input voltage, load current,
hysteresis voltage and inductance.
The Low-Battery Detect (MCP1651 and MCP1653
only) feature can be used to determine when the LBI
input voltage has fallen below a predetermined
threshold. The low-battery detect comparator
continuously monitors the voltage on the LBI pin. When
the voltage on the LBI pin is above the 1.22V + 123 mV
hysteresis, the LBO pin will be high-impedance (open-
drain). When in the high-impedance state, the leakage
current into the LBO pin is typically less than 0.1 μA. As
the voltage on the LBI pin decreases and is lower than
the 1.22V typical threshold, the LBO pin will transition
to a low state and is capable of sinking up to 10 mA.
123 mV of hysteresis is provided to prevent chattering
of the LBO pin as a result of battery input impedance
and boost input current.
4.8
PWM Latch
4.12
Power Good Output
The gated oscillator is self-latched to prevent double
and sporadic pulsing. The reset into the latch is asyn-
chronous and can terminate the pulse during the on-
time of the duty cycle. The reset can be accomplished
by the feedback voltage comparator or the current limit
comparator.
4.9 Peak Inductor Current
The external switch peak current is sensed on the CS
The Power Good Output feature (MCP1652 and
MCP1653 only) monitors the divided-down voltage
feedback into the FB pin. When the output voltage falls
more than 15% (typical) below the regulated set point,
the power good (PG) output pin will transition from a
high-impedance state (open-drain) to a low state
capable of sinking 10 mA. If the output voltage rises
more than 15% (typical) above the regulated set point,
the PG output pin will transition from high to low.
pin across an optional external current sense resistor.
If the CS pin falls more than 122 mV (typical) below
4.13
Device Protection
V IN , the current limit comparator is set and the pulse is
terminated. This prevents the current from getting too
high and damaging the N-channel MOSFET. In the
event of a short circuit, the switch current will be low
due to the current limit. However, there is a DC path
from the input through the inductor and external diode.
This is true for all boost-derived topologies and addi-
tional protection circuitry is necessary to prevent
catastrophic damage.
4.13.1 OVERCURRENT LIMIT
The Current Sense (CS) input pin is used to sense the
peak input current of the boost converter. This can be
used to limit how high the peak inductor current can
reach. The current sense feature is optional and can be
bypassed by connecting the V IN input pin to the CS
input pin. Because of the path from input through the
boost inductor and boost diode to output, the boost
topology cannot support a short circuit without
4.10
EXT Output Driver
additional circuitry. This is typical of all boost regulators.
The EXT output pin is designed to directly drive
external N-channel MOSFETs and is capable of
sourcing 400 mA (typical) and sinking 800 mA (typical)
for fast on and off transitions. The top side of the EXT
driver is connected directly to V IN , while the low side of
the driver is tied to GND, providing rail-to-rail drive
capability. Design flexibility is added by connecting an
external resistor in series with the N-channel MOSFET
to control the speed of the turn on and off. By slowing
the transition speed down, there will be less high-
frequency noise. Speeding the transition up produces
higher efficiency.
DS21876A-page 14
? 2004 Microchip Technology Inc.
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