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| 型号： | MCP1824T-0802E/OT |
| 厂商： | Microchip Technology |
| 文件页数： | 17/34页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO 0.8V .3A SOT23-5 |
| 产品培训模块： | High Current LDOs |
| 标准包装： | 3,000 |
| 稳压器拓扑结构： | 正，固定式 |
| 输出电压： | 0.8V |
| 输入电压： | 2.1 V ~ 6 V |
| 电压 - 压降（标准）： | 0.2V @ 300mA |
| 稳压器数量： | 1 |
| 电流 - 输出： | 300mA（最小） |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | SC-74A，SOT-753 |
| 供应商设备封装： | SOT-23-5 |
| 包装： | 带卷 (TR) |
| 其它名称： | MCP1824T-0802E/OTTR |
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MCP1824/MCP1824S
3.0
PIN DESCRIPTION
TABLE 3-1:
PIN FUNCTION TABLE
SOT-223
SOT-23
3-Pin
Fixed
—
1
2
3
—
—
5-Pin
Fixed
1
2
3
4
5
—
5-Pin
Adj
1
2
3
4
—
5
5-Pin
Fixed
3
1
2
5
4
—
5-Pin
Adj
3
1
2
5
—
4
Name
SHDN
V IN
GND
V OUT
PWRGD
ADJ
Description
Shutdown Control Input (active-low)
Input Voltage Supply
Ground
Regulated Output Voltage
Power Good Output
Output Voltage Adjust/Sense Input
Exposed Exposed Exposed
Pad
Pad
Pad
—
—
EP
Exposed Pad of the Package (ground potential)
3.1
Shutdown Control Input (SHDN)
3.4
Regulated Output Voltage (V OUT )
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled. When the SHDN input is
pulled low, the PWRGD output also goes low and the
LDO enters a low quiescent current shutdown state
The V OUT pin is the regulated output voltage of the
LDO. A minimum output capacitance of 1.0 μF is
required for LDO stability. The MCP1824/MCP1824S is
stable with ceramic, tantalum, and aluminum-
Capacitor” for output capacitor selection guidance.
where the typical quiescent current is 0.1 μA.
3.5
Power Good Output (PWRGD)
3.2
Input Voltage Supply (V IN )
For fixed applications, the PWRGD output is an open-
drain output used to indicate when the LDO output
Connect the unregulated or regulated input voltage
source to V IN . If the input voltage source is located
several inches away from the LDO, or the input source
is a battery, it is recommended that an input capacitor
be used. A typical input capacitance value of 1 μF to
10 μF should be sufficient for most applications. The
type of capacitor used can be ceramic, tantalum, or
aluminum electrolytic. The low ESR characteristics of
voltage is within 92% (typically) of its nominal
regulation value. The PWRGD threshold has a typical
hysteresis value of 2%. The PWRGD output is delayed
by 110 μs (typical) from the time the LDO output is
within 92% + 3% (maximum hysteresis) of the
regulated output value on power-up. This delay time is
internally fixed.
the ceramic capacitor will yield better noise and PSRR
performance at high frequency.
3.6
Output Voltage Adjust Input (ADJ)
For adjustable applications, the output voltage is
3.3
Ground (GND)
connected to the ADJ input through a resistor divider
that sets the output voltage regulation value. This
For the optimal Noise and Power Supply Rejection
Ratio (PSRR) performance, the GND pin of the LDO
should be tied to an electrically quiet circuit ground.
provides the users the capability to set the output
voltage to any value they desire within the 0.8V to 5.0V
range of the device.
This will help the LDO power supply rejection ratio and
noise performance. The ground pin of the LDO only
3.7
Exposed Pad (EP)
conducts the ground current of the LDO, so a heavy
trace is not required. For applications that have
switching or noisy inputs, tie the GND pin to the return
of the output capacitor. Ground planes help lower
inductance and voltage spikes caused by fast transient
load currents and are recommended for applications
that are subjected to fast load transients.
2007 Microchip Technology Inc.
The SOT-223 package has an exposed metal pad on
the bottom of the package. The exposed metal pad
gives the device better thermal characteristics by
providing a good thermal path to either the PCB or
heatsink to remove heat from the device. The exposed
pad of the package is at ground potential.
DS22070A-page 17
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCP1824T-1202E/DC | 功能描述:低压差稳压器 - LDO 300 mA CMOS LDO Vout 1.2V ETR RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MCP1824T-1202E/DC | 制造商:Microchip Technology Inc 功能描述:; Input Voltage Primary Max:6V; Output V |
| MCP1824T-1202E/OT | 功能描述:低压差稳压器 - LDO 300 mA CMOS LDO Vout 1.2V ETR RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MCP1824T-1202E/OT | 制造商:Microchip Technology Inc 功能描述:; Input Voltage Primary Max:6V; Output V |
| MCP1824T-1802E/DC | 功能描述:低压差稳压器 - LDO 300 mA CMOS LDO Vout 1.8V ETR RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
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