参数资料
型号: MCP2021AT-330E/MD
厂商: Microchip Technology
文件页数: 2/48页
文件大小: 0K
描述: IC TXRX LIN 3.3V LDO 8-DFN
产品培训模块: Microchip MCP20xx LIN Transceiver Overview
标准包装: 3,300
系列: *
MCP2021A/2A
DS22298A-page 10
2012 Microchip Technology Inc.
FIGURE 1-7:
VOLTAGE REGULATOR OUTPUT ON OVER-CURRENT SITUATION
1.5
Optional External Protection
1.5.1
REVERSE BATTERY PROTECTION
An external reverse-battery-blocking diode should be
used to provide polarity protection (see Figure 1-9).
1.5.2
TRANSIENT VOLTAGE
PROTECTION (LOAD DUMP)
An external 43V transient suppressor (TVS) diode,
between VBB and ground, with a transient protection
resistor (RTP) in series with the battery supply and the
VBB pin protects the device from power transients and
ESD events greater than 43V (see Figure 1-9). The
maximum value for the RTP protection resistor depends
upon two parameters: the minimum voltage the part will
start at, and the impacts of this RTP resistor on the VBB
value, thus on the Bus recessive level and slopes.
This leads to a set of three equations to fullfil.
Equation 1-1 provides a max RTP value according to
the minimum battery voltage the user wants.
Equation 1-2 provides a max RTP value according to
the maximum error on the recessive level, thus VBB,
since the part uses VBB as the reference value for the
recessive level.
Equation 1-3 provides a max RTP value according to
the maximum relative variation the user can accept on
the slope when IREG varies.
Since both Equation 1-1 and Equation 1-2 must be
fulfilled, the maximum allowed value for RTP is thus the
smaller of the two values found when solving
Usually Equation 1-1 gives the higher constraint
(smaller value) for RTP as shown in the following exam-
ple where VBATmin is 8V.
However, the user needs to check that the value found
3 as well.
While this protection is optional, it should be
considered as good engineering practice.
Note 1: IREG less than llim, regulator on
2: After IREG exceeds llim, voltage regulator output will be reduced until
voltage regulator shutdown voltage VSD is reached.
VSD
0
(1)
(2)
t
0
t
llim
IREG
mA
VREG
V
VREG-NOM
1
2
3
4
5
6
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