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| 型号： | MCP79412-I/MS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | REAL TIME CLOCK, PDSO8 |
| 封装： | ROHS COMPLAINT, PLASTIC, MSOP-8 |
| 文件页数： | 7/40页 |
| 文件大小： | 584K |
| 代理商： | MCP79412-I/MS |
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2010-2011 Microchip Technology Inc.
DS22266C-page 15
MCP7941X
In the case where the MSB of the Calibration register
is set to ‘1’, the MFP output waveforms that appear
when bits RS1 and RS0 are set to ‘01’ or ‘10’ are not
as responsive to the setting of the Calibration register.
For
example,
when
outputting
the
4.096
kHz
waveform (RS1, RS0 set to ‘01’), the output waveform
is generated using only eight input clock cycles.
Consequently, attempting to subtract more than eight
input clock cycles from this output does not have a
meaningful effect on the resulting waveform. Any
effect on the output will appear as a modification in
both the frequency and duty cycle of the waveform
appearing on the MFP output pin.
B. RS2 BIT SET TO ‘1’
With the RS2 bit set to ‘1’, the following internal timing
signal is output on the MFP pin:
The frequency listed in the table presumes an input
clock source of exactly 32.768 kHz. In terms of the
equivalent number of input clock cycles, the table
becomes:
Unlike
the
method
previously
described,
the
calibration setting is continuously applied and affects
every cycle of the output waveform. This results in the
modulation of the frequency of the output waveform
based upon the setting of the Calibration register.
Using this setting, the calibration function can be
expressed as:
Since the calibration is done every cycle, the frequency
of the output MFP waveform is constant.
4.2.4
MFP
Pin 7 is a multi-function pin and supports the following
functions:
The value of the OUT bit determines the logic
level of the I/O. This is only available when oper-
ating from VCC.
Alarm Outputs – Available in VBAT mode
FOUT mode – driven from a FOSC divider – Not
available in VBAT mode
The internal control logic for the MFP is connected to
the switched internal supply bus, this allows operation
in VBAT mode. The Alarm Output is the only mode that
operates in VBAT mode, other modes are suspended.
4.2.5
VBAT
The MCP7941X features an internal switch that will
power the clock and the SRAM. In the event that the
VCC supply is not available, the voltage applied to the
VBAT pin serves as the backup supply. A low-value
series resistor is recommended between the external
battery and the VBAT pin to limit the current to the
internal switch circuit.
The VBAT trip point is the point at which the internal
switch operates the device from the VBAT supply and
is typically 1.5V (VTRIP specification D12) typical.
When VDD falls below 1.5V the system will continue to
operate the RTCC and SRAM using the VBAT supply.
The following conditions apply:
If the VBAT feature is not being used, the VBAT pin must
be connected to GND. For more information on VBAT
conditions see the RTCC Best Practices Application
Note, AN1365.
RS2
RS1
RS0
Output Signal
1
x
64.0 Hz
RS2
RS1
RS0
Output Signal
1
x
512
Toutput
=
(2 * (256 +/- (2 * CALREG))) Tinput
where:
Toutput
=
clock period of MFP output signal
Tinput
=
clock period of input signal
CALREG
=
decimal value of the Calibration
register setting, and the sign is
determined by the MSB of the
Calibration register.
TABLE 4-2:
Supply
Condition
Read/Write
Access
Powered
By
VCC < VTRIP, VCC < VBAT
No
VBAT
VCC > VTRIP, VCC < VBAT
Yes
VCC
VCC > VTRIP, VCC > VBAT
Yes
VCC
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