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参数资料
型号： MCZ33742EG
厂商： Freescale Semiconductor
文件页数： 21/71页
文件大小： 0K
描述： IC SYSTEM BASIS CHIP CAN 28-SOIC
标准包装： 26
应用： 自动
电流 - 电源： 42mA
电源电压： 5.5 V ~ 18 V
工作温度： -40°C ~ 125°C
安装类型： 表面贴装
封装/外壳： 28-SOIC（0.295"，7.50mm 宽）
供应商设备封装： 28-SOIC W
包装： 管件
产品目录页面： 808 (CN2011-ZH PDF)
Analog Integrated Circuit Device Data
28
Freescale Semiconductor
33742
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
NORMAL REQUEST ENTERED AND NO WATCHDOG CONFIGURATION OCCURS
If the Normal Request mode is entered after the SBC powers up or after a wake-up from Stop mode and no watchdog
configuration occurs before the 350 ms time period has expired, the device enters the Reset mode. If no watchdog configuration
is performed, the 33742 will cycle from the Normal Request mode to Reset mode to Normal Request mode.
If the Normal Request mode is entered after a wake-up from Sleep mode, and no watchdog configuration occurs while the
33742S is in Normal Request mode, the SBC returns to the Sleep mode.
APPLICATION WAKE-UP FROM THE 33742
When the application is in Stop mode, it can be awakened from the SBC side. When a wake-up condition is detected by the
SBC (for example, CAN, wake-up input), the 33742 enters the Normal Request mode and generates an interrupt pulse at the
INT pin.
Table 7. Table of Operations
Mode
Voltage Regulator
HS Switch
Wake-up
Capabilities
(if Enabled)
RST Pin
INT Pin
Watchdog
Software
CAN Cell
Normal
Request
VDD: ON,
V2: OFF,
HS: OFF
–
Low for tRSTDUR time,
then HIGH
–
Normal
VDD: ON,
V2: ON,
HS: Controllable
–
Normally HIGH.
Active LOW if WDOG
or VDD under-voltage
occurs
If enabled, signal
failure (VDD
Pre-warning
Temp, CAN, HS)
Running
TXD/RXD
Standby
VDD: ON,
V2: OFF,
HS: Controllable
–
Same as Normal
mode
Same as Normal
mode
Running
Low power
Stop
VDD: ON
(Limited Current
Capability),
V2: OFF,
HS:OFF or Cyclic Sense
CAN, SPI, L0:L3,
Cyclic Sense,
Forced Wake-up,
IDD Over-current(40)
Normally HIGH.
Active LOW if
WDOG(41)
or VDD under-voltage
occurs
Signal 33742S
wake-up and
IDD > IDDS-WU
(not maskable)
Running if
enabled.
Not running if
disabled
Low power.
Wake-up capability
if enabled
Sleep
VDD: OFF,
V2: OFF,
HS: OFF or Cyclic
CAN, SPI,
L0:L3, Cyclic Sense
Forced Wake-up
LOW
Not Active
Not running
Low power.
Wake-up capability
if enabled
Normal
Debug(39)
Same as Normal
–
Normally HIGH.
Active LOW if VDD
under-voltage occurs
Same as Normal
Not running
Same as Normal
Standby
Debug(39)
Same as Standby
–
Normally HIGH.
Active LOW if VDD
under-voltage occurs
Same as Standby Not running
Same as Standby
Stop
Debug(39)
Same as Stop
Normally HIGH.
Active LOW if VDD
under-voltage occurs
Same as Stop
Not running
Same as Stop
Flash
Programming
Forced externally
–
Not operating
Notes
39.
Mode entered via special sequence described under the heading Debug Mode: Hardware and Software Debug with the 33742,
beginning on page 34.
40.
IDD over-current always enabled.
41.
WDOG if enabled.
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MCZ33780EG 制造商:Freescale Semiconductor 功能描述:DUAL DBUS MASTER INTERFACE 16SOIC
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