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| 型号： | MCZ33993EWR2 |
| 厂商： | Freescale Semiconductor |
| 文件页数： | 26/28页 |
| 文件大小： | 0K |
| 描述： | IC MULTIPLE SWITCH DETECT 32SOIC |
| 标准包装： | 1,000 |
| 系列： | * |
| 应用： | * |
| 接口： | * |
| 电源电压： | * |
| 封装/外壳： | 32-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 32-SOIC |
| 包装： | 带卷 (TR) |
| 安装类型： | 表面贴装 |
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Analog Integrated Circuit Device Data
Freescale Semiconductor
7
33993
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
ARCHIVE
INFORMATION
ARCHIVE
INFORMATION
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 4. Dynamic Electrical Characteristics
Characteristics noted under conditions 3.1 V
≤ VDD ≤ 5.25 V, 8.0 V ≤ VPWR ≤ 16 V, -40°C ≤ TC ≤ 125°C, unless otherwise
noted. Typical values noted reflect the approximate parameter means VPWR = 13 V, TA = 25°C under nominal conditions unless
otherwise noted.
Characteristic
Symbol
Min
Typ
Max
Unit
SWITCH INPUT
Pulse Wetting Current Time
tPULSE(ON)
15
16
20
ms
Interrupt Delay Time
Normal Mode
tINT-DLY
–
5.0
16
μs
Sleep Mode Switch Scan Time
tSCAN
100
200
300
μs
Calibrated Scan Timer Accuracy
Sleep Mode
tSCAN TIMER
–
10
%
Calibrated Interrupt Timer Accuracy
Sleep Mode
tINT TIMER
–
10
%
DIGITAL INTERFACE TIMING (11)
VPWR ≤ 0.2 V
tRESET
–
10
μs
Falling Edge of CS to Rising Edge of SCLK
Required Setup Time
tLEAD
100
–
ns
Falling Edge of SCLK to Rising Edge of CS
Required Setup Time
tLAG
50
–
ns
SI to Falling Edge of SCLK
Required Setup Time
tSI(SU)
16
–
ns
Falling Edge of SCLK to SI
Required Hold Time
tSI(HOLD)
20
–
ns
SI, CS, SCLK Signal Rise Time (13)
tR(SI)
–
5.0
–
ns
SI, CS, SCLK Signal Fall Time (13)
tF(SI)
–
5.0
–
ns
Time from Falling Edge of CS to SO Low Impedance (14)
tSO(EN)
–
55
ns
Time from Rising Edge of CS to SO High Impedance (15)
tSO(DIS)
–
55
ns
Time from Rising Edge of SCLK to SO Data Valid (16)
tVALID
–
25
55
ns
Notes
11.
These parameters are guaranteed by design. Production test equipment uses a 4.16 MHz, 5.0 V SPI interface.
12.
This parameter is guaranteed by design but not production tested.
13.
Rise and Fall time of the incoming SI, CS, and SCLK signals are suggested for design considerations to prevent the occurrence of double
pulsing.
14.
Time required for valid output status data to be available on SO pin.
15.
Time required for output states data to be terminated at SO pin.
16.
Time required to obtain valid data out from SO following the rise of SCLK with 200 pF load.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MCZ33996CEK | 制造商:Freescale Semiconductor 功能描述:16 LOW SIDE SW - Bulk |
| MCZ33996CEKR2 | 制造商:Freescale Semiconductor 功能描述:16 LOW SIDE SW - Tape and Reel |
| MCZ33996EK | 功能描述:开关变换器、稳压器与控制器 16 LOW SIDE SW RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
| MCZ33996EK | 制造商:Freescale Semiconductor 功能描述:IC LOAD SWITCH 27V 32SOIC |
| MCZ33996EKR2 | 功能描述:开关变换器、稳压器与控制器 16 LOW SIDE SW 1.20HM RoHS:否 制造商:Texas Instruments 输出电压:1.2 V to 10 V 输出电流:300 mA 输出功率: 输入电压:3 V to 17 V 开关频率:1 MHz 工作温度范围: 安装风格:SMD/SMT 封装 / 箱体:WSON-8 封装:Reel |
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