参数资料
型号: MIC2193BM TR
厂商: Micrel Inc
文件页数: 7/10页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 8-SOIC
标准包装: 2,500
PWM 型: 电流模式
输出数: 1
频率 - 最大: 440kHz
占空比: 100%
电源电压: 2.9 V ~ 14 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 125°C
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
其它名称: MIC2193BMTR
MIC2193BMTR-ND
MIC2193
The MIC2193 controller is broken down into five functions.
? Control loop
- PWM operation
- Current mode control
? Current limit
? Reference and V DD
? MOSFET gate drive
Micrel
Current Limit
The output current is detected by the voltage drop across the
external current sense resistor (R SENSE in Figure 1.). The
current sense resistor must be sized using the minimum
current limit threshold. The external components must be
designed to withstand the maximum current limit. The current
sense resistor value is calculated by the equation below:
? Oscillator
Control Loop
R SENSE =
MIN _ CURRENT _ SENSE _ THRESHOLD
I OUT _ MAX
PWM Control Loop
The MIC2193 uses current mode control to regulate the
The maximum output current is:
output voltage. This dual control loop method (illustrated in
Figure 2) senses the output voltage (outer loop) and the
I OUT _ MAX =
MAX _ CURRENT _ SENSE _ THRESHOLD
R SENSE
inductor current (inner loop). It uses inductor current and
output voltage to determine the duty cycle of the buck
converter. Sampling the inductor current effectively removes
the inductor from the control loop, which simplifies compen-
sation.
V IN
The current sense pins VIN (pin 1) and CSL (pin 4) are noise
sensitive due to the low signal level and high input impedance
and switching noise on the VIN pin. The PCB traces should
be short and routed close to each other. A 10nF capacitor
across the pins will attenuate high frequency switching noise.
When the peak inductor current exceeds the current limit
Switching
Converter
Switch
I INDUCTOR
V OUT
Voltage
Divider
threshold, the overcurrent comparator turns off the high side
MOSFET for the remainder of the switching cycle, effectively
decreasing the duty cycle. The output voltage drops as
additional load current is pulled from the converter. When the
voltage at the feedback pin (FB) reaches approximately 0.3V,
the circuit enters frequency foldback mode and the oscillator
frequency will drop to approximately 1/4 of the switching
Driver
I INDUCTOR
V ERROR
V ERROR
V REF
frequency. This limits the maximum output power delivered to
the load under a short circuit condition.
Reference and V DD Circuits
The output drivers are enabled when the V DD voltage (pin 5)
is greater than its undervoltage threshold.
The internal bias circuit generates an internal 1.245V band-
gap reference voltage for the voltage error amplifier and a 3V
V DD voltage for the internal control circuitry. The VDD pin
must be decoupled with a 1 μ F ceramic capacitor. The capaci-
tor must be placed close to the VDD pin. The other end of the
t ON
t PER
D = t ON /t PER
Figure 2. Current Mode Control Example
As shown in Figure 1, the inductor current is sensed by
measuring the voltage across the resistor, R SENSE . A ramp is
added to the amplified current sense signal to provide slope
compensation, which is required to prevent unstable opera-
tion at duty cycles greater than 50%.
A transconductance amplifier is used for the error amplifier,
which compares an attenuated sample of the output voltage
with a reference voltage. The output of the error amplifier is
the compensation pin (COMP), which is compared to the
current sense waveform in the PWM block. When the current
signal becomes greater than the error signal, the comparator
turns off the high-side drive. The COMP pin provides access
to the output of the error amplifier and allows the use of
external components to stabilize the voltage loop.
capacitor must be connected directly to the ground plane.
MOSFET Gate Drive
The MIC2193 is designed to drive a high-side, P-Channel
MOSFET and a low side, N-Channel MOSFET. The source
pin of the P-channel MOSFET is connected to the input of the
power supply. It is turned on when OUTP pulls the gate of the
MOSFET low. The advantage of using a P-channel MOSFET
is that it does not required a bootstrap circuit to boost the gate
voltage higher than the input, as would be required for an N-
channel MOSFET.
The VIN pin (pin 1) supplies the drive voltage to both gate
drive pins, OUTN and OUTP. The VIN pin must be well
decoupled to prevent noise from affecting the current sense
circuit, which uses VIN as one of the sense pins.
A non-overlap time is built into the MOSFET driver circuitry.
This dead time prevents the high-side and low-side MOSFET
drivers from being on at the same time. Either an external
diode or the low-side MOSFET internal parasitic diode con-
ducts the inductor current during the dead time.
April 2004
7
M9999-042704
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