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| 型号： | MIC2196YM TR |
| 厂商： | Micrel Inc |
| 文件页数： | 9/12页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST FLYBK PWM 8SOIC |
| 标准包装： | 2,500 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 440kHz |
| 占空比： | 85% |
| 电源电压： | 2.9 V ~ 14 V |
| 降压： | 无 |
| 升压： | 是 |
| 回扫： | 是 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 125°C |
| 封装/外壳： | 8-SOIC（0.154"，3.90mm 宽） |
| 包装： | 带卷 (TR) |
| 其它名称： | MIC2196YMTR MIC2196YMTR-ND |
Micrel, Inc.
MIC2196
× ( R WINDING + R DSON )
V L = V IN ?
where:
V O × I O
V IN × η
R WINDING is the winding resistance of the inductor
R DSON is the on resistance of the low side
switching MOSFET
where:
Q_gate is the total gate charge of the external
MOSFET
The graph in Figure 4 shows the total gate charge which
can be driven by the MIC2196 over the input voltage
range. Higher gate charge will slow down the turn-on
and turn-off times of the MOSFET, which increases
The maximum value of current sense resistor is:
switching losses.
R SENSE =
V SENSE
I IND(pk)
250
Max. Gate Charge
where:
V SENSE is the minimum current sense threshold
of the CS pin.
200
150
The current sense pin, CS, is noise sensitive due to the
low signal level. The current sense voltage
measurement is referenced to the signal ground pin of
the MIC2196. The current sense resistor ground should
100
50
0
be located close to the IC ground. Make sure there are
no high currents flowing in this trace. The PCB trace
between the high side of the current sense resistor and
0
2
4 6 8 10 12 14
INPUT VOLTAGE (V)
the CS pin should also be short and routed close to the
ground connection. The input to the internal current
sense amplifier has a 30ns dead time at the beginning of
each switching cycle. This dead time prevents leading
edge current spikes from prematurely terminating the
switching cycle. A small RC filter between the current
sense pin and current sense resistor may help to
attenuate larger switching spikes or high frequency
switching noise. Adding the filter slows down the current
sense signal, which has the effect of slightly raising the
overcurrent limit threshold.
MOSFET Gate Drive
The MIC2196 converter drives a low-side N-Channel
MOSFET. The driver for the OUTN pin has a 2 ? typical
source and sink impedance. The V IN pin is the supply pin
for the gate drive circuit. The maximum supply voltage to
the V IN pin is 14V.
MOSFET Selection
In a boost converter, the V DS of the MOSFET is
approximately equal to the output voltage. The maximum
V DS rating of the MOSFET must be high enough to allow
for ringing and spikes in addition to the output voltage.
The V IN pin supplies the N-Channel gate drive voltage.
The V GS threshold voltage of the N-channel MOSFET
must be low enough to operate at the minimum V IN
voltage to guarantee the boost converter will start up.
The maximum amount of MOSFET gate charge that can
be driven is limited by the power dissipation in the
MIC2196. The power dissipated by the gate drive
circuitry is calculated below:
P_gate_dri ve = Q_gate × V IN × fs
Figure 4. MIC2196 Frequency vs. Gate Charge
External Schottky Diode
In a boost converter topology, the boost diode, D1 must
be rated to handle the peak and average current. The
average current through the diode is equal to the
average output current of the boost converter. The peak
current is calculated in the current limit section of this
specification.
For the MIC2196, Schottky diodes are recommended
when they can be used. They have a lower forward
voltage drop than ultra-fast rectifier diodes, which lowers
power dissipation and improves efficiency. They also do
not have a recovery time mechanism, which results in
less ringing and noise when the diode turns off. If the
output voltage of the circuit prevents the use of a
Schottky diode, then only ultra-fast recovery diodes
should be used. Slower diodes will dissipate more power
in both the MOSFET and the diode. The will also cause
excessive ringing and noise when the diode turns off.
Reference, Enable and UVLO Circuits
The output drivers are enabled when the following
conditions are satisfied:
? The V DD voltage (pin 5) is greater than its
undervoltage threshold.
? The voltage on the enable pin is greater than the
enable UVLO threshold.
The internal bias circuitry generates a 1.245V bandgap
reference for the voltage error amplifier and a 3V V DD
voltage for the internal supply bus. The V DD pin must be
decoupled to ground with a 1 μ F ceramic capacitor.
September 2008
9
M9999-092908
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