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参数资料
| 型号： | MIC23051-CGYML TR |
| 厂商： | Micrel Inc |
| 文件页数： | 8/13页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC 1V/1.8V 8MLF |
| 产品培训模块： | MIC23xxx HyperLight Load™ Regulators |
| 标准包装： | 1 |
| 系列： | HyperLight Load® |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 1V，1.8V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 混合物 |
| 频率 - 开关： | 4MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-VFDFN 裸露焊盘，8-MLF? |
| 包装： | 标准包装 |
| 供应商设备封装： | 8-MLF?（2x2） |
| 产品目录页面： | 1094 (CN2011-ZH PDF) |
| 其它名称： | 576-3015-6 |
Micrel, Inc.
Functional Description
VIN
VIN provides power to the MOSFETs for the switch mode
regulator section and to the analog supply circuitry. Due to
the high switching speeds, a 2.2μF or greater capacitor is
recommended close to VIN and the power ground (PGND)
pin for bypassing. Refer to the layout recommendations for
details.
EN
The enable pin (EN) controls the on and off state of the
device. A logic high on the enable pin activates the
regulator, while a logic low deactivates it. MIC23051
features built-in soft-start circuitry that reduces in-rush
current and prevents the output voltage from overshooting
at start up. Do not leave floating.
SW
The switch (SW) pin connects directly to the inductor and
provides the switching current necessary to operate in
PWM mode. Due to the high speed switching on this pin,
the switch node should be routed away from sensitive
nodes such as the CFF pin.
SNS
An inductor is connected from the SW pin to the SNS pin.
The SNS pin is the output pin of the device and a minimum
of 2.2μF bypass capacitor should be connected in shunt.
In order to reduce parasitic inductance it is good practice
to place the output bypass capacitor as close to the
inductor as possible.
MIC23051
CFF
The CFF pin is connected to the SNS pin of MIC23051
with a feed-forward capacitor of 560pF. The CFF pin itself
is compared with the internal reference voltage (V REF ) of
the device and provides the control path to control the
output. V REF is equal to 0.72V. The CFF pin is sensitive to
noise and should be place away from the SW pin. Refer to
the layout recommendations for details.
VSC
The voltage scaling pin (VSC) is used to switch between
two different voltage levels. A logic high on the VSC pin
will set the output voltage to the higher voltage. A logic low
on the VSC pin will set the output voltage to the lower
voltage. Do not leave floating.
PGND
Power ground (PGND) is the ground path for the high
current PWM mode. The current loop for the power ground
should be as small as possible and separate from the
Analog ground (AGND) loop. Refer to the layout
recommendations for more details.
AGND
Signal ground (AGND) is the ground path for the biasing
and control circuitry. The current loop for the signal ground
should be separate from the Power ground (PGND) loop.
Refer to the layout recommendations for more details.
July 2009
8
M9999—070809-F
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