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参数资料
| 型号： | MIC23155-GYMT TR |
| 厂商： | Micrel Inc |
| 文件页数： | 11/19页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC 1.8V 2A 10TMLF |
| 标准包装： | 1 |
| 系列： | HyperLight Load® |
| 类型： | 降压（降压） |
| 输出类型： | 固定 |
| 输出数： | 1 |
| 输出电压： | 1.8V |
| 输入电压： | 2.7 V ~ 5.5 V |
| PWM 型： | 混合物 |
| 频率 - 开关： | 3MHz |
| 电流 - 输出： | 2A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-UFDFN 裸露焊盘，10-TMLF? |
| 包装： | 标准包装 |
| 供应商设备封装： | 10-TMLF?（2.5x2.5） |
| 其它名称： | 576-3970-6 |
milliseconds is 270x10 x ln(10) x C SS . For example, for
Micrel Inc.
Functional Description
V IN
The input supply (V IN ) provides power to the internal
MOSFETs for the switch mode regulator along with the
internal control circuitry. The V IN operating range is 2.7V
to 5.5V. An input capacitor with a minimum voltage
rating of 6.3V is recommended. Due to the high
switching speed, a minimum 2.2μF bypass capacitor
placed close to VIN and the power ground (PGND) pin is
required. Refer to the PCB Layout Recommendations for
details.
EN
A logic high signal on the enable pin activates the output
voltage of the device. A logic low signal on the enable
pin deactivates the output and reduces supply current to
0.01μA. MIC23155 features external soft start circuitry
via the SS pin that reduces inrush current and prevents
the output voltage from overshooting at start up. Do not
leave the EN pin floating.
SW
The switch (SW) connects directly to one end of the
inductor and provides the current path during switching
cycles. The other end of the inductor is connected to the
load, SNS pin, and output capacitor. Due to the high
speed switching on this pin, the switch node should be
routed away from sensitive nodes whenever possible.
SNS
The sense (SNS) pin is connected to the output of the
MIC23155
PGND
The power ground pin is the ground path for the high
current in PWM mode. The current loop for the power
ground should be as small as possible and separate
from the analog ground (AGND) loop as applicable.
Refer to the layout recommendations for more details.
PG
The power good (PG) pin is an open drain output which
indicates when the output voltage is within regulation.
This is indicated by a logic high signal when the output
voltage is above the PG threshold. Connect a pull up
resistor greater than 5k ? from PG to V OUT .
SS
The SS pin is used to control the output voltage ramp up
time. The approximate equation for the ramp time in
3
a C SS = 470pF, T RISE ≈ 300μs. Refer to the “V OUT Rise
Time vs. C SS ” graph in the Typical Characteristics
section. The minimum recommended value for C SS is
200pF.
FB
The feedback (FB) pin is provided for the adjustable
voltage option. This is the control input for setting the
output voltage. A resistor divider network is connected to
this pin from the output and is compared to the internal
0.62V reference within the regulation loop.
The output voltage can be calculated using Equation 1:
V OUT = V REF ? ? 1 +
?
device to provide feedback to the control circuitry. The
SNS connection should be placed close to the output
capacitor. Refer to the layout recommendations for more
?
?
R1 ?
R2 ?
Eq. 1
details. The SNS pin also provides the output active
discharge circuit path to pull down the output voltage
when the device is disabled.
Recommended feedback resistor values:
AGND
The analog ground (AGND) is the ground path for the
biasing and control circuitry. The current loop for the
signal ground should be separate from the power ground
(PGND) loop. Refer to the layout recommendations for
more details.
November 2012
11
V OUT
1.2V
1.5V
1.8V
2.5V
3.3V
R1
274k
316k
301k
324k
309k
R2
294k
221k
158k
107k
71.5k
M9999-110812-A
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