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参数资料
| 型号： | MIC2590B-5BTQ TR |
| 厂商： | Micrel Inc |
| 文件页数： | 15/23页 |
| 文件大小： | 230K |
| 描述： | IC PCI HOT PLUG CTLR DUAL 48TQFP |
| 标准包装： | 2,000 |
| 类型： | 热交换控制器 |
| 应用： | PCI，PCI-X |
| 内部开关： | 无 |
| 电源电压： | 3.3V，5V，±12V |
| 工作温度： | 0°C ~ 70°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 48-TQFP |
| 供应商设备封装： | 48-TQFP（7x7） |
| 包装： | 带卷 (TR) |
| 其它名称： | MIC2590B-5BTQTR MIC2590B-5BTQTR-ND |
Micrel, Inc.
MIC2590B
September 2008
15
M9999-091808
Detailed Register Descriptions below:
Conversion Result Register (RESULT), 8-Bits Read Only
D[7]
read-only
D[6]
read-only
D[5]
read-only
D[4]
read-only
D[3]
read-only
D[2]
read-only
D[1]
read-only
D[0]
read-only
Voltage or Current Data from ADC
Bit
Function
Operation
D[7:0]
Measure data from ADC
Read Only
Power-Up Default Value:
Undefined following POR
Read Command Byte:
0000 0000
b
= 00
h
(ADC Control Register ADCNTRL), 8-Bits Read/Write
D[7]
read-only
D[6]
read-only
D[5]
read-only
D[4]
read-
write
D[3]
read-
write
D[2]
read-
write
D[1]
read-
write
D[0]
read-
write
Busy
Reserved
Reserved
SEL PAR
Supply Select
SUP[2:0]
Bit(s)
Function
Operation
BUSY
ADC Status
0 = ADC Quiescent
1 = ADC Busy
D[6]
Reserved
Always Read as Zero
D[5]
Reserved
Always Read as Zero
SEL
A/D Slot Select
Specifies Channel for
A/D Conversion
0 = Slot A
1 = Slot B
PAR
Parameter Control Bit
for ADC Conversion
0 = Current
1 = Voltage
SUP[2:0]
Supply Select for ADC
Conversion
000 = No Conversion
001 = 3.3V Supply
010 = 5.0V Supply
011 = +12V Supply
100 = -12V Supply
101 = VAUX Supply
Power-Up Default Value:
0000 0000
b
= 00
h
Command Byte (R/W):
0000 0001
b
= 01
h
To operate the ADC the ADCNTRL register must first be
initialized by selecting a slot, specifying whether voltage
or current is to be measured and then specifying the
specific supply that is to be monitored. The software must
then wait 100ms, or poll the BUSY bit until it is zero. The
RESULT register will then contain the valid result of the
conversion.
Control Register, Slot A (CNTRLB), 8-Bits Read/Write
D[7]
read-only
D[6]
read-only
D[5]
read-only
D[4]
read-only
D[3]
read-only
D[2]
read-only
D[1]
read-write
D[0]
read-write
AUXAPG
MAINAPG Reserved Reserved Reserved Reserved
MAINA
AUXA
Bit(s)
Function
Operation
AUXAPG AUX Output Power-
Good Status, Slot A
1 = Power-Good
(VAUXA output is
above its V
UVTH
threshold)
MAINAPG MAIN Output Power-
Good Status, Slot A
1 = Power-Good
(MAINA output is
above its V
UVTH
threshold)
D[5]
Reserved
Always Read as Zero
D[4]
Reserved
Always Read as Zero
D[3]
Reserved
Always Read as Zero
D[2]
Reserved
Always Read as Zero
MAINA
MAIN Enable Control,
Slot A
0 = OFF, 1 = ON
VAUXA
VAUX Enable Control,
Slot A
0 = OFF, 1 = ON
Power-Up Default Value:
0000 0000
b
= 00
h
Command Byte (R/W):
0000 0010
b
= 02
h
The power-up default value is 00h. Slot A is disabled
upon power-up, i.e., all supply outputs are off.
Control Register, Slot B (CNTRLB), 8-Bits Read/Write
D[7]
read-only
D[6]
read-only
D[5]
read-only
D[4]
read-only
D[3]
read-only
D[2]
read-only
D[1]
read-write
D[0]
read-write
AUXBPG
MAINBPG Reserved Reserved Reserved Reserved
MAINB
AUXB
Bit(s)
Function
Operation
AUXBPG AUX Output Power-
Good Status, Slot B
1 = Power-Good
(VAUXB output is
above its V
UVTH
threshold)
MAINBPG MAIN Output Power-
Good Status, Slot B
1 = Power-Good
(MAINB output is
above its V
UVTH
threshold)
D[5]
Reserved
Always Read as Zero
D[4]
Reserved
Always Read as Zero
D[3]
Reserved
Always Read as Zero
D[2]
Reserved
Always Read as Zero
MAINB
MAIN Enable Control,
Slot B
0 = OFF, 1 = ON
VAUXB
VAUX Enable Control,
Slot B
0 = OFF, 1 = ON
Power-Up Default Value:
0000 0000
b
= 00
h
Command Byte (R/W):
0000 0011
b
= 03
h
The power-up default value is 00h. Slot B is disabled
upon power-up, i.e., all supply outputs are off.
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