参数资料
| 型号： | MIC68200YML TR |
| 厂商： | Micrel Inc |
| 文件页数： | 13/16页 |
| 文件大小： | 0K |
| 描述： | IC REG LDO ADJ 1A 10MLF |
| 标准包装： | 1 |
| 稳压器拓扑结构： | 正，可调式 |
| 输出电压： | 0.5 V ~ 5.5 V |
| 输入电压： | 1.65 V ~ 5.5 V |
| 电压 - 压降（标准）： | 0.3V @ 2A |
| 稳压器数量： | 1 |
| 电流 - 输出： | 1A |
| 电流 - 限制（最小）： | 2A |
| 工作温度： | -40°C ~ 125°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-VFDFN 裸露焊盘，10-MLF? |
| 供应商设备封装： | 10-MLF?（3x3） |
| 包装： | 标准包装 |
| 产品目录页面： | 1109 (CN2011-ZH PDF) |
| 其它名称： | 576-2897-6 |
Micrel, Inc.
Ramp Up: Cap Controlled Slew Rate
If a capacitor is connected to RC, the bidirectional
Sequencing Connections
MIC68200
U1
Master POR
current source will charge the cap during startup and
discharge the cap during shutdown. The size of the
capacitor and the RC current (1μA nom) control the
slew rate of the output voltage during startup. For
example, to ramp up a 1.8V regulator from zero to full
output in 10mSec requires a 5.6nF capacitor.
V IN = 2.5V
EN
10K
MIC68200-1.8YML
IN OUT
RC
EN GND DLY
CDlyM
4.7 μ F
I/O
μ Processor
T RC = V OUT ? ? RC
? ?
SR ON = ? ?
?
?
U2
Slave
For Fixed Versions:
? C
? 1 μ A
?
?
? 1 μ A
? C RC
?
?
MIC68200-1.2YML
IN OUT
RC POR
EN GND DLY
CDlyS
4.7 μ F
Core
/RESET
Similarly, to slew an adjustable (any output voltage)
from 0 to full output in 10mSec requires a 20nF cap.
For Adjustable Versions:
10K
T RC = 0 . 5 V ? ? RC
? ?
SR ON = 2V OUT ? ?
?
?
? C
? 1 μ A
?
?
? 1 μ A
? C RC
?
?
Delayed Sequencing
CDlyS > CDlyM [CDlyS=2nF; CDlyM=1nF]
Ramp Down: Turn Off Slew Rate
When EN is lowered and the DLY pin has discharged,
the RC pin and the OUT pin slew toward zero. For
fixed voltage devices, the RC pin slew rate is 2 to 3
times the SR ON defined above. For adjustable voltage
devices the RC pin slew is much higher. In both
cases, turn off slew rate may be determined by the
RC pin for low values of output capacitor, or by the
maximum discharge current available at the output for
large values of output capacitor. Turn off slew rate is
not a specified characteristic of the MIC68200.
Sequencing Configurations
Sequencing refers to timing based Master/Slave
control between regulators. It allows a Master device
to control the start and stop timing of a single or
multiple Slave devices. In typical sequencing the
Master POR drives the Slave EN. The sequence
begins with the Master EN driven high. The Master
output ramps up and triggers the Master DLY when
the Master output reaches 90%. The Master DLY then
determines when the POR is released to enable the
Slave device. When the Master EN is driven low, the
Master POR is immediately pulled low causing the
Slave to ramp down. However, the Master output will
not ramp down until the Master DLY has fully
discharged. In this way, the Master power can remain
good after the Slave has been ramped down.
In sequencing configurations the Master DLY controls
the turn-on time of the Slave and the Slave DLY
controls the turn-off time of the Slave.
Windowed Sequencing
CDlyS < CDlyM [CDlyS=1nF; CDlyM=2nF]
February 2011
13
M9999-022311-E
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MIC68220 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Dual 2A LDO Regulator |
| MIC68220_10 | 制造商:MICREL 制造商全称:Micrel Semiconductor 功能描述:Dual 2A LDO Regulator |
| MIC68220YML | 制造商:Rochester Electronics LLC 功能描述: 制造商:RF Micro Devices Inc 功能描述: |
| MIC68220YML TR | 功能描述:低压差稳压器 - LDO Dual 2A with Ramp Control in 4x5mm 20-Lead MLF (Lead-Free) RoHS:否 制造商:Texas Instruments 最大输入电压:36 V 输出电压:1.4 V to 20.5 V 回动电压（最大值）:307 mV 输出电流:1 A 负载调节:0.3 % 输出端数量: 输出类型:Fixed 最大工作温度:+ 125 C 安装风格:SMD/SMT 封装 / 箱体:VQFN-20 |
| MIC68220YMLTR | 制造商:Micrel 功能描述:LDO Regulator Pos 0.5V to 5.5V 2A |
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