参数资料
型号: MICRF219AYQS TR
厂商: Micrel Inc
文件页数: 15/23页
文件大小: 0K
描述: IC RECEIVER QWIKRADIO 16QSOP
标准包装: 2,500
频率: 300MHz ~ 450MHz
灵敏度: -110dBm
数据传输率 - 最大: 10 kbps
调制或协议: ASK,OOK
电流 - 接收: 6mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 105°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 带卷 (TR)
Micrel
MICRF219
REFO SC (MH z)
9.81563
12.15269
13.02519
13.52127
Carrier (M Hz)
315.0
3 90.0
418.0
433.92
HIB Part Number
SA-9.815630-F-10-H-30-30-X
SA-12.152690-F-10-H-30-30-X
SA-13.025190-F-10-H-30-30-X
SA-13.521270-F-10-H-30-30-X
Abraco n Part Number
ABLS-9.81563MHz-10J4Y
ABLS-12.15269MHz-10J4Y
ABLS-13.025190MHz-10J4Y
ABLS-13.521270MHz-10J4Y
Table 4. Crystal F requencies and Vendor Part Numbers
Demodulator Bandwidth Selection and D ata
Stream Optimization
JP1 and JP2 are the bandwidth selectio n fo r the
demodulator bandwidth. To set it corre ctly, it is
necessary to know the shortest pulse wi dth o f the
encoded data sent in the transmitter. Sim ilar to the
example of the data profile in the Figure 7, PW2 is
shorter than PW1, so PW2 should be us ed for the
demodulator bandwidth calculation which i s found by
0.65/shortest pulse width. After this value is foun d , the
setting should be done according to Ta ble 5. For
example, if the pulse period is 100μsec, 50% duty
S EL0
J P1
Short
Open
Short
Open
SEL1
J P2
Short
Short
Open
Open
De mod.
B W
(h ertz)
1565
3130
6261
12523
Shortest
Pulse
(μsec)
416
208
104
52
Maximum
Baud Rate
for 50%
Duty Cycle
(Hz)
1204
2408
4816
9633
cycle, the pulse width will be 50μsec (PW = (100 μsec
× 50%) / 100). Therefore, a bandwidth of 13kHz would
be necessary (0.65 / 50μsec). However, if this data
stre am had a pulse p eriod wit h a 20% du ty cycle, then
Table 6. P1 an d JP2 Setting, 418.0MHz
the ba ndw idt h requi re d wo ul d be 32.5k Hz (0 .65 /
20μsec). This would exce ed the maximu m band width
of th e dem odulator circuit. If one tries to excee d the
max im um ba ndw idth, th e pu lse would appear
stre tc hed o r w ider.
SEL0
JP1
Short
SEL1
JP2
Short
Demod.
BW
(hertz)
1170
Shortest
Pulse
(μsec)
445
Maximum
Baud Rate
for 50%
Duty Cycle
(Hz)
1123
SEL0
JP1
SEL1
JP2
Demod.
BW
(hertz)
Shortes t
Pulse
(μsec)
Maxim um
Baud Rate
for 50% Duty
C ycle (Hz)
Open
Short
Open
Short
Open
Open
2350
4700
9400
223
111
56
2246
4493
8987
Short
Short
1625
400
1250
Open
Short
Open
Short
Open
Open
3250
6500
13000
200
100
50
2500
5000
10000
Table 7. JP1 and JP2 Setting, 315MHz
AGC Capacitor and Data Slicer Threshold
Capacitor Selection
Table 5. JP1 and JP2 Setting, 433.92MHz
Other frequencies will have different demodulator
bandwidth limits, which is derived from the reference
oscillator frequency. Table 6 and Table 7 shows the
limits for the other two most used frequencies.
Capacitors C6 and C4 are C TH and C AGC capacitors
respectively providing a time base reference for the
data pattern received. These capacitors are selected
according to data profile, pulse duty cycle, dead time
between two received data packets, and if the data
pattern does has or not have a preamble. See Figure
8 for example of a data profile.
June 2011
15
M9999-060811
(408) 944-0800
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