参数资料
型号: MICRF221AYQS
厂商: Micrel Inc
文件页数: 17/26页
文件大小: 0K
描述: IC RF RECEIVER QWIKRADIO 16-QSOP
标准包装: 98
频率: 50MHz ~ 950MHz
灵敏度: -109dBm
数据传输率 - 最大: 10 kbps
调制或协议: ASK,OOK
电流 - 接收: 9.3mA
数据接口: PCB,表面贴装
天线连接器: PCB,表面贴装
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
封装/外壳: 16-SSOP(0.154",3.90mm 宽)
供应商设备封装: 16-QSOP
包装: 管件
产品目录页面: 571 (CN2011-ZH PDF)
其它名称: 576-3230-5
Micrel Inc.
MICRF221
T6
T 7
BIT TIME 0
BIT TIME 1
BIT TIME 2
SCLK
T1
T2
T4
T5
T8
T9
T3
“19”
“0”
“0”
“1”
DO AS
DO INPUT BITS:
D19
D18
D17
OUTPUT
Figure 12. Serial Interface Start Sequence
device through the DO pin toggling
When using an external oscillator or reference
oscillator signal, the maximum level should not
exceed 1.5V PP . See Figure 13. Channel 4 is the
transmitted data, which is synchronized with the
shutdown shown in the oscilloscope (channel 2). Data
out is shown on channel 1 and, as seen below, the
preamble data starts to appear just over 1msec after
the shutdown pin cycle low to high. Also note that
when squelch is used time for data to appear is
increased.
Figure 13. Time-to-Preamble Data after Shut Down
Cycle, Room Temperature
Programming the Device
Several additional functions are available by the serial
interface. They are:
from low to data
? High Demodulator Bandwidth, for
faster baud rates
? Parallel input pins SEL0, SEL1, and
SQ can be programmed using the
serial interface
Programming the device is accomplished by the use
of pins DO and SCLK. Normally, pin 10 (DO) is
outputting data and needs to switch to an input pin
made by the start sequence, as shown at Figure 13. A
high at the SCLK pin tri-states the DO pin, enabling
the external drive into the DO pin with an initial low
level. The start sequence is completed by taking
SCLK low, then high while DO is low, followed by
taking DO high, then low while SCLK is high. The
serial interface is initialized and ready to receive the
programming data.
Bits are serially programmed starting with the most
significant bit (MSB = D19) if all bits are being
programmed until the least significant bit (LSB =D0)
For instance, if only the desense bits D0, D1, and D2
are being programmed, then these are the only bits
that need to be programmed with the start sequence
D2, D1, D0, plus the stop sequence. Or, if only the
squelch bit D17 is needed, then the sequence must
be from start sequence, D17 through D0 plus the stop
sequence, making sure the other bits (besides D17)
are programmed as needed. It is recommended that
all parallel input pins (SEL0, SEL1, and SQ) be kept
high when using the serial interface. After the
programming bits are finished, a stop sequence (as
shown in Figure 14) is required to end the mode and
?
?
?
Desense, to reduce the device
sensitivity
Slice Level, to further optimize data
profile demodulation
Autopoll Mode, to wake an external
make the DO pin as an output again. To do so, the
SCLK pin is kept high while the DO pin changes from
low to high, then low again, followed by the SCLK pin
made low. Timing of the programming bits are not
critical, but should be kept as shown below:
October 2008
17
M9999-100108
(408) 955-1690
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