MK1442/MK1443
SCSI and Ethernet Clock Source
MDS 1442/3 E
1
Revision 111500
Printed 11/15/00
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408)297-1201tel www.icst.com
The MK1442/3 are the ideal way to generate
clocks for desktop computer motherboards and
LAN workstations. Using analog Phase-Locked
Loop (PLL) techniques, the devices accept a
14.318 MHz crystal input to produce multiple
output clocks up to 100 MHz. They provide
2XCPU, CPU, floppy controller, keyboard,
system, SCSI and Ethernet clocks. The MK1442/3
are perfect for new Pentium Processor, PCI bus
and 486 systems. The devices can operate at 5V or
3.3V up to and including 80MHz on the CPU
clock.
The devices are identical except the MK1442 has
an Output Enable (OE) pin that tri-states all
outputs when taken low, and the MK1443 has an
extra 14.318 MHz clock.
Crystal
Oscillator
VDD
GND
X1
X2
Clock Synthesis
and Control
Circuitry
2XCPU
14.318 MHz
40.000 MHz
24.00 MHz
8.00, 12.00,
or 16.00 MHz
Output
Buffer
CPUS0
CPUS1
14.318 MHz
crystal
Block Diagram
Description
Features
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
Output
Buffer
÷2
CPU
OE (all outputs, MK1442 only)
20.000 MHz
Provides exact frequency Ethernet and SCSI clocks
5V or 3.3V (up to 80MHz) operation
Output clock frequencies up to 100 MHz
Pentium Processor compatible timing
486 compatible smooth frequency transitions
Seven or eight output clocks
Compatible with X86 and 680X0 CPUs
Skew controlled 2X and 1X CPU to within 250ps
Packaged in 16 pin skinny SOIC or PDIP
Duty cycle of 47.5/52.5 up to 66.66 MHz
Duty cycle of 45/55 up to 100 MHz
Total of 15 different selectable CPU frequencies
Tri-state outputs for board level testing
25mA drive capability at TTL levels
Keyboard frequencies of 12MHz (-01),
8MHz (-02), or 16MHz (-03)
Advanced, low power CMOS process
MK1442 - output enable
MK1443 - two 14.318 MHz outputs
14.318 MHz
(MK1443 only)
Output
Buffer