参数资料
型号: MK1493-02AGLF
元件分类: 时钟产生/分配
英文描述: 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
封装: 6.10 MM, 0.50 MM PITCH, TSSOP-56
文件页数: 20/24页
文件大小: 444K
代理商: MK1493-02AGLF
Networking/PCI Clock Generator
MDS 1493-02A C
5
Revision 020204
Integrated Circuit Systems, Inc.
525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
MK1493-02A
General SMBUS Serial Interface Info
General SM-Bus Serial Interface
Information
How to Write:
Controller (host) sends a start bit
Controller (host) sends the write address D2
(H)
ICS clock will acknowledge
Controller (host) sends the beginning byte location =
N
ICS clock will acknowledge
Controller sends Byte Count X
ICS clock will acknowledge
Controller (host) starts sending Byte N through Byte
N+X-1
ICS clock will acknowledge each byte one at a time
Controller (host) sends a Stop bit
How to Read:
Controller (host) will send a start bit
Controller (host) sends the write address D2
(H)
ICS clock will acknowledge
Controller (host) sends the beginning Byte location =
N
ICS clock will acknowledge
Controller (host) will send a repeat start bit
Controller (host) sends the read address Byte D3
(H)
ICS clock will acknowledge
ICS clock will send the data Byte count = X
ICS clock sends Byte N
ICS clock sends Byte N+X-1
Controller (host) will need to acknowledge each Byte
Controller (host) will send a not acknowledge bit
Controller (host) will send a stop bit
Index Block Write Operation
Controller (Host)
ICS (Slave/Receiver)
TstarT
Slave
Address D2
(H)
WR
ACK
Beg Location = N
ACK
Data Byte Count = X
ACK
Beginning Byte N
X
Byte
O
ACK
O
Byte N + X - 1
ACK
PstoP
Index Block Read Operation
Controller (Host)
ICS (Slave/Receiver)
TstarT bit
Slave Address
D2 (H)
WR
=0
ACK
Beginning Loc = N
ACK
RT
repeat
starT
Slave Address
D2 (H)
RD
=1
ACK
Data Byte Count=X
ACK
X
B
Y
T
E
S
Beginning Byte N
ACK
O
Byte N + X - 1
N
NAK
PstoP bit
相关PDF资料
PDF描述
MK1493-02AGLFTR 200 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO56
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MK2049-10SI 44.736 MHz, OTHER CLOCK GENERATOR, PDSO20
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