参数资料
型号: MK1707S
元件分类: 时钟及定时
英文描述: PLL BASED CLOCK DRIVER, PDSO8
封装: 0.150 INCH, SOIC-8
文件页数: 3/6页
文件大小: 88K
代理商: MK1707S
Low EMI Clock Generator
MDS 1707 E
3
Revision 012203
Integrated Circuit Systems, Inc. q 525 Race Street, San Jose, CA 95126 q tel (408) 295-9800 q
www.icst.com
MK1707
External Components
The MK1707 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD and GND on pins 2 and 3, as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50
trace (a commonly used
trace impedance) place a 33
resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
.
Tri-level Select Pin Operation
The S1, S0 select pins are tri-level, meaning they have
three separate states to make the selections shown in
the table on page 2. To select the M (mid) level, the
connection to these pins must be eliminated by either
floating them originally, or tri-stating the GPIO pins
which drive the select pins.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01F decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
the decoupling capacitor and VDD pin. The PCB trace
to VDD pin should be kept as short as possible, as
should the PCB trace to the ground via.
2) To minimize EMI the 33
series termination resistor,
if needed, should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers. Other signal traces should be routed
away from the MK1707. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
Powerup Considerations
To insure proper operation of the spread spectrum
generation circuit, some precautions must be taken
while utilizing the MK1707.
1. An input signal should not be applied to ICLK until
VDD is stable (within 10% of its final value). This
requirement can easily be met by operating the
MK1707 and then ICLK source from the same power
supply.
2. LEE should not be enabled (taken high) until after
the power supplies and input clock are stable. This
requirement can be met by direct control of LEE by
system logic - for example, a “power good” signal.
Another solution is to leave LEE unconnected to
anything but a 0.01
F capacitor to ground. The internal
pullup resistor on LEE will charge the capacitor and
provide approximately a 700
s delay until spread
spectrum is enabled.
3. If the input frequency is changed during operation,
disable spread spectrum until the input clock stabilizes
at the new frequency.
相关PDF资料
PDF描述
MK1709AGLF 1709 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK1709SLFTR 1709 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK1709AGLF 1709 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK1709AGLFTR 1709 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
MK2302S-01LF 2302 SERIES, PLL BASED CLOCK DRIVER, 1 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO8
相关代理商/技术参数
参数描述
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MK1707SILF 功能描述:时钟发生器及支持产品 LOW EMI CLOCK GENERATOR RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
MK1707SILFTR 功能描述:时钟发生器及支持产品 LOW EMI CLOCK GENERATOR RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56
MK1707SITR 功能描述:IC CLK GENERATOR LOW EMI 8-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器,PLL,频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:*
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