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参数资料
| 型号： | MK1714-01RLFTR |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 200 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| 封装： | 0.150 INCH, ROHS COMPLIANT, SSOP-20 |
| 文件页数： | 4/8页 |
| 文件大小： | 182K |
| 代理商： | MK1714-01RLFTR |
Spread Spectrum Multiplier Clock
MDS 1714-01 J
4
Revision 061305
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK1714-01
External Components
The MK1714-01 requires a minimum number of
external components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD and GND, as close to these pins as
possible. For optimum device performance, the
decoupling capacitor should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be
used. To series terminate a 50
trace (a commonly
used trace impedance) place a 33
resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
.
Crystal Tuning Load Capacitors
Crystal Load Capacitors
The device crystal connections should include pads for
small capacitors from X1 to ground and from X2 to
ground. These capacitors are used to adjust the stray
capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming
process, it is important to keep stray capacitance to a
minimum by using very short PCB traces (and no vias)
been the crystal and device. Crystal capacitors must be
connected from each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal
(CL-6)*2. In this equation, CL= crystal load capacitance
in pF. Example: For a crystal with a 16 pF load
capacitance, each crystal capacitor would be
[16 - 6]*2 = 20pF.
If the output frequency is not critical, external load
capacitors are not necessary.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01F decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
the PCB trace to the ground via. Distance of the ferrite
bead and bulk decoupling from the device is less
critical.
2) The external crystal should be mounted just next to
the device with short traces. The X1 and X2 traces
should not be routed next to each other with minimum
spaces, instead they should be separated and away
from other traces.
3) To minimize EMI the 33
series termination resistor,
if needed, should be placed close to the clock output.
4) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers (the ferrite bead and bulk decoupling
capacitor can be mounted on the back). Other signal
traces should be routed away from the MK1714-01.
This includes signal traces just underneath the device,
or on layers adjacent to the ground plane layer used by
the device.
Powerup Considerations
To insure proper operation of the spread spectrum
generation circuit, some precautions must be taken in
the implementation of the MK1714-01.
1) An input signal should not be applied to X1 until VDD
is stable (within 10% of its final value). This
requirement can be easily met by operating the
MK1714-01 and the X1 source from the same power
supply. This requirement is not applicable if a crystal is
used.
2) LEE should not be enabled (taken high) until after
the power supplies and input clock are stable. This
requirement can be met by direct control of LEE by
system logic; for example, a “power good” signal.
Another solution is to leave LEE unconnected but place
a 0.01
F capacitor to ground. The pull-up resistor on
LEE will charge the capacitor and provide
approximately a 700
s delay until spread spectrum is
enabled.
3) If the input frequency is changed during operation,
disable spread spectrum until the input clock stabilizes
at the new frequency.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK1714-01RTR | 功能描述:IC CLK MULT SPRD SPECTRUM 20QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK1714-02 | 制造商:ICS 制造商全称:ICS 功能描述:Spread Spectrum Multiplier Clock |
| MK1714-02R | 功能描述:IC CLK MULT SPRD SPECTRUM 20QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK1714-02RI | 功能描述:IC CLK MULT SPRD SPECTRUM 20QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK1714-02RILF | 功能描述:时钟发生器及支持产品 SPREAD SPECTRUM MULTIPLIER CLOCK RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
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