参数资料
型号: MK2011S
元件分类: 时钟产生/分配
英文描述: 50 MHz, OTHER CLOCK GENERATOR, PDSO8
封装: SOIC-8
文件页数: 3/4页
文件大小: 45K
代理商: MK2011S
MK2011
Fast Ethernet Clock Source
MDS2011B
3
Revision 12057
Printed 12/5/97
MicroClock Division of ICS1271 Parkmoor Ave.San JoseCA95126(408)295-9800tel(408)295-9818fax
ICRO
CLOCK
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device. Prolonged exposure
to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. Typical values are at 25°C.
Electrical Specifications
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply Voltage, VDD
Referenced to GND
7
V
Inputs
Referenced to GND
-0.5
VDD+.5V
V
Clock Outputs
Referenced to GND
-0.5
VDD+.5V
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 20 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (at 5.0V unless otherwise noted)
Operating Voltage, VDD
4.5
5.5
V
Input High Voltage, VIH, input clock only
Clock input
3.5
2.5
V
Input Low Voltage, VIL, input clock only
Clock input
2.5
1.5
V
Output High Voltage, VOH
IOH=-4mA
VDD-0.4
V
Output High Voltage, VOH
IOH=-25mA
2.4
V
Output Low Voltage, VOL
IOL=25mA
0.4
V
Operating Supply Current, IDD, 5V
No Load
19
mA
Operating Supply Current, IDD, 3.3V
No Load
10
mA
Input Capacitance
7
pF
Actual Mean Frequency versus Target
With exact crystal
0
ppm
AC CHARACTERISTICS
Input Clock or Crystal Frequency
20.0000
MHz
Input Crystal Accuracy
50
ppm
Input Clock Duty Cycle, 20.000MHz
Time above 2.5V
20
80
%
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
Time above 1.5V
45
50
55
%
Absolute Clock Period Jitter, 20 MHz output
-400
250
400
ps
Absolute Clock Period Jitter, 50, 25 MHz clocks
-300
150
300
ps
One Sigma Clock Period Jitter
All outputs
70
ps
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