参数资料
型号: MK2069-02GITR
元件分类: 时钟产生/分配
英文描述: 160 MHz, OTHER CLOCK GENERATOR, PDSO56
封装: 6.10 MM, 0.50 MM PITCH, TSSOP-56
文件页数: 18/20页
文件大小: 347K
代理商: MK2069-02GITR
VCXO-Based Clock Jitter Attenuator and Translator
MDS 2069-02 G
7
Revision 050203
Integrated Circuit Systems, Inc. l 525 Race Street, San Jose, CA 95126 l tel (408) 295-9800 l
MK2069-02
Notes on setting the value of CP
As another general rule, the following relationship
should be maintained between components CS and CP
in the loop filter:
CP establishes a second pole in the VCXO PLL loop
filter. For higher damping factors (> 1), calculate the
value of CP based on a CS value that would be used for
a damping factor of 1. This will minimize baseband
peaking and loop instability that can lead to output jitter.
CP also damps VCXO input voltage modulation by the
charge pump correction pulses. A CP value that is too
low will result in increased output phase noise at the
phase detector frequency due to this. In extreme cases
where input jitter is high, charge pump current is high,
and CP is too small, the VCXO input voltage can hit the
supply or ground rail resulting in non-linear loop
response.
The best way to set the value of CP is to use the filter
response software available from ICS (please refer to
the following section). CP should be increased in value
until it just starts affecting the passband peak.
Loop Filter Response Software
Online tools to calculate loop filter response can be
found at www.icst.com.
Graph of Charge Pump Current vs. Value of RSET (external resistor)
CP
CS
20
------
=
10E-6
100E-6
1E-3
100E+3
1E+6
10E+6
RSET, ohms
I CP
,A
m
p
s
Recommended Range
of Operation
相关PDF资料
PDF描述
MK2069-02GILFTR 160 MHz, OTHER CLOCK GENERATOR, PDSO56
MK2069-02GILFTR 160 MHz, OTHER CLOCK GENERATOR, PDSO56
MK2069-03GITR 160 MHz, OTHER CLOCK GENERATOR, PDSO56
MK2069-03GITR 160 MHz, OTHER CLOCK GENERATOR, PDSO56
MK2069-04GITR 160 MHz, OTHER CLOCK GENERATOR, PDSO56
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