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参数资料
| 型号： | MK2761ASTR |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 27 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO16 |
| 封装： | 0.150 INCH, SOIC-16 |
| 文件页数： | 4/7页 |
| 文件大小： | 185K |
| 代理商： | MK2761ASTR |
MK2761A
SET-TOP CLOCK SOURCE
CLOCK SYNTHESIZER
IDT / ICS SET-TOP CLOCK SOURCE
4
MK2761A
REV D 070705
DC Electrical Characteristics
VDD = 5.0 V ±10% (unless otherwise noted), Temp 0 to +70
°C
Note 1: With ACLK clock at 12.28 MHz.
AC Electrical Characteristics
VDD = 5.0 V ±10% (unless otherwise noted), Temp 0 to +70
°C
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Operating Voltage
VDD
4.5
5.5
V
Input High Voltage
VIH
X1/ICLK pin only
3.5
2.5
V
Input Low Voltage
VIL
X1/ICLK pin only
2.5
1.5
V
Input High Voltage
VIH
2V
Input Low Voltage
VIL
0.8
V
Output High Voltage
VOH
IOH = -25 mA
2.4
V
Output Low Voltage
VOL
IOL = 25 mA
0.4
V
Output High Voltage, CMOS
level
VOH
IOH = -8 mA
VDD-0.4
V
Operating Supply Current
IDD
No load, Note 1
65
mA
Short Circuit Current
IOS
Each output
±100
mA
Input Capacitance
CIN
7pF
Frequency Error, ACLK
0
ppm
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Units
Input Frequency
27
MHz
Output Clock Rise Time
tOR
0.8 to 2.0 V
1.5
ns
Output Clock Fall Time
tOF
2.0 to 0.8 V
1.5
ns
Output Clock Duty Cycle
At 1.4 V
40
60
%
Absolute Jitter, short term
Variation from mean
±250
ps
Skew of 27 MHz Outputs
Rising edges at 1.4 V
-500
0
500
ps
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PDF描述 |
|---|---|
| MK2761S | 27 MHz, OTHER CLOCK GENERATOR, PDSO16 |
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| MK2771-05STR | 50 MHz, OTHER CLOCK GENERATOR, PDSO20 |
| MK2771-16RTR | 50 MHz, OTHER CLOCK GENERATOR, PDSO28 |
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