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参数资料
| 型号： | MK2771-15RLF |
| 厂商： | INTEGRATED DEVICE TECHNOLOGY INC |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| 封装： | LEAD FREE, SSOP-28 |
| 文件页数： | 3/7页 |
| 文件大小： | 178K |
| 代理商： | MK2771-15RLF |
MK2771-15
VCXO AND SET-TOP CLOCK SOURCE
VCXO AND SYNTHESIZER
IDT VCXO AND SET-TOP CLOCK SOURCE
3
MK2771-15
REV H 051310
Pin Descriptions
Pin
Number
Pin
Name
Pin Type
Pin Description
1
PCS0
Input
Processor clock select 0. Selects PCLKs on pins 11 and 12. See
table above. Internal pull-up resistor.
2
X2
XO
Crystal connection. Connect to a pullable 13.5 MHz crystal.
3
X1
XI
Crystal connection. Connect to a pullable 13.5 MHz crystal.
4, 5, 8
VDD
Power
Connect to +5 V.
6
VIN
Input
Voltage input to VCXO. Zero to 3 V signal which controls the
frequency of the VCXO.
7
VDDIO
Power
Connect to +3.3 V or +5 V. Amplitude of inputs must, and outputs
will, match this.
9
SC
Tri-level input Communications clock select pin. Biased to M level if floating
10, 18,
19, 24
GND
Power
Connect to ground.
11
PCLK1
Output
Processor clock output number 1. Determined by status of
PCS2:0.
12
PCLK2
Output
Processor clock output number 2. Determined by status of
PCS2:0.
13
PCS1
Input
Processor clock select 1. Selects PCLKs on pins 11 and 12. See
table above. Internal pull-up resistor.
14
ACLK
Output
Audio clock output. Determined by status of ACS1, ACS0 per
table above.
15
DC
—
Don’t Connect anything to this pin.
16
13.5M
Output
13.50 MHz VCXO clock output.
17
CCLK2
Output
Communications clock output 2 determined by status of SC per
table above.
20
PCS2
Input
Processor clock select 2. Selects PCLKs on pins 11 and 12. See
table above. Internal pull-up resistor.
21, 22
VDD
Power
Connect to +5 V.
23
CCLK1
Output
Communications clock output 1 determined by status of SC per
table above.
25
27M
Output
27.00 MHz VCXO clock output.
26
54M
Output
54.00 MHz VCXO clock output.
27
ACS0
Input
Audio clock select 0. Selects ACLK on pin 14. See table above.
Internal pull-up resistor.
28
ACS1
Input
Audio clock select 1. Selects ACLK on pin 14. See table above.
Internal pull-up resistor.
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| MK2771-15RTR | 100 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| MK2771-15R | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| MK2771-15RTR | 100 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
| MK2771-16RLFTR | 50 MHz, PROC SPECIFIC CLOCK GENERATOR, PDSO28 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK2771-15RLFTR | 功能描述:时钟合成器/抖动清除器 VCXO AND SET-TOP CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MK2771-15RTR | 功能描述:IC CLK SRC VCXO/SET-TOP 28-QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK2771-16 | 制造商:ICS 制造商全称:ICS 功能描述:VCXO and Set-Top Clock Source |
| MK2771-16R | 功能描述:IC CLK SRC VCXO/SET-TOP 28-QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK2771-16RLF | 功能描述:时钟合成器/抖动清除器 VCXO AND SET-TOP CLOCK SOURCE RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
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