MK3233
Handheld System Clock Synthesizer
MDS 3233 F
1
Revision 11070
Printed 11/16/00
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA 95126 (408) 295-9800 tel www.icst.com
I C R O
C LOC K
Input crystal frequency of 32.768 kHz
Lowest power solution available
Operating temperature of -20 to 70 °C
Output clock frequencies up to 50 MHz
Three output clocks
3.3 V or 5.0 V operation
Duty cycle of 45/55
Eight selectable CPU frequencies
CPU or Communication clock power down
Separate battery supply pin for 32 kHz runs to 2V
IDD less than 4A when 32 kHz running
Serial port clocks of 1.8432 MHz (-01 version) or
3.6864 MHz (-02 version)
Packaged in 16 pin narrow SOIC
The MK3233 is the smallest size, lowest power system
clock synthesizer available. It is the ideal way to
generate clocks for smart cell phones, PDAs, and other
devices where low power is required. Using analog
Phase-Locked Loop (PLL) techniques, the device
operates from a single 32.768 kHz crystal to produce
the 32.768 kHz, CPU, and serial communications
output clocks.
The device has multiple power down modes for the
CPU, communications, and 32.768 kHz clocks.
The MK3233 can save board space and cost even if it
only replaces the 32 kHz oscillator circuitry and one
additional surface mount crystal or oscillator. The
extremely low IDD, the ease of surface mounting, the
upgradeability of CPU frequencies, and the power
down capability are added benefits in using the part.
Description
Features
Crystal
Oscillator
VDD
GND
CPU
Clock Synthesis
and Control
Circuitry
CPUCLK
32.768 kHz
1.843 or
3.686 MHz
Output
Buffer
Output
Buffer
Output
Buffer
CPUS0
CPUS1
CPUS2
32.768 kHz
crystal
or
clock
Block Diagram
VDD32
PDCOMM
PDCPU
PD
X1
X2
Communications
Clock Synthesis
and Control
Circuitry