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参数资料
| 型号： | MK3720BTRLF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 54 MHz, OTHER CLOCK GENERATOR, PDSO8 |
| 封装： | 0.150 INCH, SOIC-8 |
| 文件页数： | 3/6页 |
| 文件大小： | 100K |
| 代理商： | MK3720BTRLF |
27 MHZ AND 54 MHZ 3.3 VOLT VCXO
MDS 3720 H
3
Revision 052504
In te gr ated Circuit Systems ● 525 Ra ce Street, San Jose, CA 9512 6 ● tel (4 08) 297-1 201 ● www.icst.com
MK3720
External Component Selection
The MK3720 requires a minimum number of external
components for proper operation.
Decoupling Capacitor
A decoupling capacitor of 0.01F must be connected
between VDD (pin 2) and GND (pin 4), as close to
these pins as possible. For optimum device
performance, the decoupling capacitor should be
mounted on the component side of the PCB. Avoid the
use of vias in the decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output (CLK,
pin 5) and the load is over 1 inch, series termination
should be used. To series terminate a 50
trace (a
commonly used trace impedance) place a 33
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
.
Quartz Crystal
The MK3720 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The frequency of oscillation of a quartz crystal is
determined by its “cut” and by the load capacitors
connected to it. The MK3720 incorporates on-chip
variable load capacitors that “pull” (change) the
frequency of the crystal. The crystal specified for use
with the MK3720 is designed to have zero frequency
error when the total of on-chip + stray capacitance is
14 pF.
Recommended Crystal Parameters:
See application note MAN05 for crystal information.
MAN05 is available on the internet at
www.icst.com/pdf/man05.pdf.
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the MK3720. There should be no via’s between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these
capacitors can be found in application note MAN05.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK3720D | 功能描述:IC VCXO DTV/SET-TOP 8-SOIC RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:2,000 系列:- 类型:PLL 时钟发生器 PLL:带旁路 输入:LVCMOS，LVPECL 输出:LVCMOS 电路数:1 比率 - 输入:输出:2:11 差分 - 输入:输出:是/无 频率 - 最大:240MHz 除法器/乘法器:是/无 电源电压:3.135 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:带卷 (TR) |
| MK3720DLF | 功能描述:时钟合成器/抖动清除器 27MHZ AND 54MHZ 3.3V VCXO RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MK3720DLFTR | 功能描述:时钟合成器/抖动清除器 27MHZ AND 54MHZ 3.3V VCXO RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MK3720DTR | 功能描述:时钟合成器/抖动清除器 27MHZ AND 54MHZ 3.3V VCXO RoHS:否 制造商:Skyworks Solutions, Inc. 输出端数量: 输出电平: 最大输出频率: 输入电平: 最大输入频率:6.1 GHz 电源电压-最大:3.3 V 电源电压-最小:2.7 V 封装 / 箱体:TSSOP-28 封装:Reel |
| MK3720S | 制造商:ICS 制造商全称:ICS 功能描述:27 MHz and 54 MHz 3.3 Volt VCXO |
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