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参数资料
| 型号： | MK3771-17ATRLF |
| 元件分类： | 时钟产生/分配 |
| 英文描述： | 108 MHz, OTHER CLOCK GENERATOR, PDSO28 |
| 封装： | QSOP-28 |
| 文件页数： | 3/4页 |
| 文件大小： | 62K |
| 代理商： | MK3771-17ATRLF |
MK3771-17
VCXO and HDTV Set-Top Clock Source
MDS 3771-17 B
3
Revision 091701
Integrated Circuit Systems, Inc. 525 Race Street San Jose CA95126 408) 295-9800tel www.icst.com
Parameter
Conditions
Minimum
Typical
Maximum
Units
ABSOLUTE MAXIMUM RATINGS (note 1)
Supply voltage, VDD
Referenced to GND
7
V
Inputs and Clock Outputs
Referenced to GND
-0.5
VDD+0.5
V
Ambient Operating Temperature
0
70
°C
Soldering Temperature
Max of 10 seconds
260
°C
Storage temperature
-65
150
°C
DC CHARACTERISTICS (VDD = 3.3V unless noted)
Operating Voltage, VDD
3.15
3.30
3.45
V
Input High Voltage, VIH, except TI pins
2
V
Input Low Voltage, VIL, except TI pins
0.8
V
Input High Voltage, VIH, all TI pins
VDD-0.5
V
Input Low Voltage, VIL, all TI pins
0.5
V
Output High Voltage, VOH
IOH=-12mA
2.4
V
Output Low Voltage, VOL
IOL=12mA
0.4
V
Output High Voltage, VOH, CMOS level
IOH=-8mA
VDD-0.4
V
Operating Supply Current, IDD, MK3771-17R No Load, note 2
28
mA
Operating Supply Current, IDD, MK3771-17A No Load, note 2
37
mA
Short Circuit Current
Each output
±50
mA
Input Capacitance
5
pF
Frequency synthesis error
All clocks
0
ppm
VIN, VCXO control voltage
0
3.3
V
AC CHARACTERISTICS (VDD = 3.3V unless noted)
Input Frequency
13.500000
MHz
Output Clock Rise Time
0.8 to 2.0V
1.5
ns
Output Clock Fall Time
2.0 to 0.8V
1.5
ns
Output Clock Duty Cycle
At VDD/2
40
60
%
Maximum Absolute Jitter, short term
±250
ps
VCXO Gain, MK3771-17R
VIN = VDD/2 ± 1V
100
ppm/V
VCXO Gain, MK3771-17A
VIN = VDD/2 ± 1V
120
ppm/V
Crystal pullability, note 3, MK3771-17R
0V
≤ VIN ≤ 3.3 V
±100
ppm
Crystal pullability, note 3, MK3771-17A
0V
≤ VIN ≤ 3.3 V
±115
ppm
Electrical Specifications
Notes:
1. Stresses beyond those listed under Absolute Maximum Ratings could cause permanent damage to the device.
Prolonged exposure to levels above the operating limits but below the Absolute Maximums may affect device reliability.
2. With all clocks at highest MHz.
3. With a pullable crystal that conforms to ICS’ specifications
The MK3771-17 requires a minimum number of external components for proper operation. Use a low inductance
ground plane, connect all GNDs to this. Connect 0.01F decoupling caps on pins 4, 5, 7, 8 and 22 directly to the
ground plane, as close to the MK3771-17 as possible. A series termination resistor of 33
may be used for each clock
output. The 13.500 MHz crystal must be connected as close to the chip as possible. The crystal should be a parallel
mode, pullable, with load capacitance of 14 pF. See page 4 for crystal specifications. Please follow Application Note
MAN05 for pullable crystal layout.
External Components
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK3771-17R | 功能描述:IC VCXO/PLL CLK SYNTHESZR 28SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK3771-17RLF | 功能描述:VCXO振荡器 VCXO AND HDTV SET-TO P CLOCK SOURCE RoHS:否 制造商:Fox 封装 / 箱体:5 mm x 3.2 mm 频率:19.2 Mhz 频率稳定性:2.5 PPM 输出格式: 封装:Reel 电源电压:3 V 端接类型:SMD/SMT 尺寸:3.2 mm W x 5 mm L x 1.5 mm H 最小工作温度:- 20 C 最大工作温度:+ 75 C |
| MK3771-17RLFTR | 功能描述:时钟发生器及支持产品 VCXO AND HDTV SET-TO P CLOCK SOURCE RoHS:否 制造商:Silicon Labs 类型:Clock Generators 最大输入频率:14.318 MHz 最大输出频率:166 MHz 输出端数量:16 占空比 - 最大:55 % 工作电源电压:3.3 V 工作电源电流:1 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:QFN-56 |
| MK3771-17RTR | 功能描述:IC VCXO/PLL CLK SYNTHESZR 28SSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟发生器，PLL，频率合成器 系列:- 标准包装:39 系列:- 类型:* PLL:带旁路 输入:时钟 输出:时钟 电路数:1 比率 - 输入:输出:1:10 差分 - 输入:输出:是/是 频率 - 最大:170MHz 除法器/乘法器:无/无 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:* 封装/外壳:* 供应商设备封装:* 包装:* |
| MK3801N06 | 制造商:SGS 功能描述:REV H |
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