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参数资料
| 型号： | MK3805RILFT |
| 元件分类： | 时钟及定时 |
| 英文描述： | 3805 SERIES, LOW SKEW CLOCK DRIVER, 10 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20 |
| 封装： | 0.150 INCH, SSOP-20 |
| 文件页数： | 3/6页 |
| 文件大小： | 122K |
| 代理商： | MK3805RILFT |
Buffer/Clock Driver
MDS 3805 C
3
Revision 092105
Integrated Circuit Systems, Inc.
● 525 Race Street, San Jose, CA 95126 ● tel (408) 297-1201 ● www.icst.com
MK3805
External Components
The MK3805 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
Decoupling capacitors of 0.01F must be connected
between VDD and GND, as close to these pins as
possible. For optimum device performance, the
decoupling capacitors should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock outputs and the
loads are over 1 inch, series termination should be
used. To series terminate a 50
trace (a commonly
used trace impedance) place a 33
resistor in series
with the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
1) The 0.01F decoupling capacitors should be
mounted on the component side of the board as close
to the VDD pins as possible. No vias should be used
between the decoupling capacitors and VDD pins. The
PCB trace to VDD pin should be kept as short as
possible, as should the PCB trace to the ground via.
2) To minimize EMI, the 33
series termination resistor
(if needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through the
signal layers. Other signal traces should be routed
away from the MK3805. This includes signal traces just
underneath the device, or on layers adjacent to the
ground plane layer used by the device.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the MK3805. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
7 V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
Ambient Operating Temperature
-40 to +85
°C
Storage Temperature
-65 to +150
°C
Junction Temperature
125
°C
Soldering Temperature
260
°C
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相关代理商/技术参数 |
参数描述 |
|---|---|
| MK3805RILFTR | 功能描述:时钟驱动器及分配 BUFFER/CLOCK DRIVER RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel |
| MK3805RIT | 制造商:ICS 制造商全称:ICS 功能描述:Buffer/Clock Driver |
| MK3805RITR | 功能描述:IC CLK BUFFER 1:5 100MHZ 20-QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:- 标准包装:1 系列:HiPerClockS™ 类型:扇出缓冲器（分配），多路复用器 电路数:1 比率 - 输入:输出:2:18 差分 - 输入:输出:是/无 输入:CML，LVCMOS，LVPECL，LVTTL，SSTL 输出:LVCMOS，LVTTL 频率 - 最大:250MHz 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:- 其它名称:800-1923-6 |
| MK3807-01 | 制造商:IDT 制造商全称:Integrated Device Technology 功能描述:BUFFER/CLOCK DRIVER |
| MK3807-01RI | 功能描述:IC CLK BUFF 1:10 100MHZ 20-QSOP RoHS:否 类别:集成电路 (IC) >> 时钟/计时 - 时钟缓冲器，驱动器 系列:- 标准包装:1 系列:HiPerClockS™ 类型:扇出缓冲器（分配），多路复用器 电路数:1 比率 - 输入:输出:2:18 差分 - 输入:输出:是/无 输入:CML，LVCMOS，LVPECL，LVTTL，SSTL 输出:LVCMOS，LVTTL 频率 - 最大:250MHz 电源电压:2.375 V ~ 3.465 V 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:32-LQFP 供应商设备封装:32-TQFP（7x7） 包装:- 其它名称:800-1923-6 |
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