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参数资料
| 型号： | MK51DN512ZCLL10 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP100 |
| 封装： | 14 X 14 MM, LQFP-100 |
| 文件页数： | 4/74页 |
| 文件大小： | 1031K |
| 代理商： | MK51DN512ZCLL10 |
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Table 1. Voltage and current operating requirements (continued)
Symbol
Description
Min.
Max.
Unit
Notes
IICAIO
Analog2, EXTAL, and XTAL pin DC injection current
— single pin
VIN < VSS-0.3V (Negative current injection)
VIN > VDD+0.3V (Positive current injection)
-5
—
+5
mA
IICcont
Contiguous pin DC injection current —regional limit,
includes sum of negative injection currents or sum of
positive injection currents of 16 contiguous pins
Negative current injection
Positive current injection
-25
—
+25
mA
VRAM
VDD voltage required to retain RAM
1.2
—
V
VRFVBAT
VBAT voltage required to retain the VBAT register file
TBD
—
V
1. All 5 volt tolerant digital I/O pins are internally clamped to VSS through a ESD protection diode. There is no diode
connection to VDD. If VIN greater than VDIO_MIN (=VSS-0.3V) is observed, then there is no need to provide current limiting
resistors at the pads. If this limit cannot be observed then a current limiting resistor is required. The negative DC injection
current limiting resistor is calculated as R=(VDIO_MIN-VIN)/|IIC|.
2. Analog pins are defined as pins that do not have an associated general purpose I/O port function.
3. All analog pins are internally clamped to VSS and VDD through ESD protection diodes. If VIN is greater than VAIO_MIN
(=VSS-0.3V) and VIN is less than VAIO_MAX(=VDD+0.3V) is observed, then there is no need to provide current limiting
resistors at the pads. If these limits cannot be observed then a current limiting resistor is required. The negative DC
injection current limiting resistor is calculated as R=(VAIO_MIN-VIN)/|IIC|. The positive injection current limiting resistor is
calcualted as R=(VIN-VAIO_MAX)/|IIC|. Select the larger of these two calculated resistances.
5.1.2 LVD and POR operating requirements
Table 2. VDD supply LVD and POR operating requirements
Symbol
Description
Min.
Typ.
Max.
Unit
Notes
VPOR
Falling VDD POR detect voltage
TBD
1.1
TBD
V
VLVDH
Falling low-voltage detect threshold — high
range (LVDV=01)
TBD
2.56
TBD
V
VLVW1H
VLVW2H
VLVW3H
VLVW4H
Low-voltage warning thresholds — high range
Level 1 falling (LVWV=00)
Level 2 falling (LVWV=01)
Level 3 falling (LVWV=10)
Level 4 falling (LVWV=11)
TBD
2.70
2.80
2.90
3.00
TBD
V
VHYSH
Low-voltage inhibit reset/recover hysteresis —
high range
60
mV
VLVDL
Falling low-voltage detect threshold — low range
(LVDV=00)
TBD
1.60
TBD
V
Table continues on the next page...
General
K51 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011.
12
Preliminary
Freescale Semiconductor, Inc.
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