参数资料
型号: MK60N512VMC100
厂商: FREESCALE SEMICONDUCTOR INC
元件分类: 微控制器/微处理器
英文描述: FLASH, 100 MHz, RISC MICROCONTROLLER, PBGA121
封装: 8 X 8 MM, MAPBGA-121
文件页数: 63/72页
文件大小: 1812K
代理商: MK60N512VMC100
8.1 K60 Signal Multiplexing and Pin Assignments
The following table shows the signals available on each pin and the locations of these
pins on the devices supported by this document. The Port Control Module is responsible
for selecting which ALT functionality is available on each pin.
NOTE
The 81-pin ballmap assignments are currently being developed.
The in the entries in this package column indicate which
signals are present on the package.
121
MAP
BGA
Pin Name
Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
PTE0
ADC1_SE4a ADC1_SE4a PTE0
SPI1_PCS1
UART1_TX
SDHC0_D1
I2C1_SDA
PTE1
ADC1_SE5a ADC1_SE5a PTE1
SPI1_SOUT UART1_RX
SDHC0_D0
I2C1_SCL
PTE2
ADC1_SE6a ADC1_SE6a PTE2
SPI1_SCK
UART1_CTS
_b
SDHC0_DCL
K
PTE3
ADC1_SE7a ADC1_SE7a PTE3
SPI1_SIN
UART1_RTS
_b
SDHC0_CM
D
PTE4
DISABLED
PTE4
SPI1_PCS0
UART3_TX
SDHC0_D3
PTE5
DISABLED
PTE5
SPI1_PCS2
UART3_RX
SDHC0_D2
PTE6
DISABLED
PTE6
SPI1_PCS3
UART3_CTS
_b
I2S0_MCLK
I2S0_CLKIN
VDD
VSS
USB0_DP
USB0_DM
VOUT33
VREGIN
ADC0_DP1
ADC0_DM1
ADC1_DP1
ADC1_DM1
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DP/
ADC0_DP0/
ADC1_DP3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA0_DM/
ADC0_DM0/
ADC1_DM3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DP/
ADC1_DP0/
ADC0_DP3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
PGA1_DM/
ADC1_DM0/
ADC0_DM3
VDDA
VREFH
Pinout
K60 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
66
Preliminary
Freescale Semiconductor, Inc.
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